esp-idf

hwcrypto: Fix bug with concurrent SHA access

2017-08-25 16:08:03 +10:00

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

ld

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

lib @ fc2118052e

esp32: Update wifi lib to use new spinlock implementation

2017-09-04 19:11:51 +10:00

test

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

brownout.c

brownout detector: enable by default

2017-07-10 17:25:55 +08:00

cache_err_int.c

component/soc : move dport access header files to soc

2017-05-09 18:06:00 +08:00

clk.c

Disable some peripheral clocks when cpu starts

2017-08-29 11:18:42 +08:00

component.mk

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

core_dump.c

esp32: Core dump sanity checks were added

2017-04-26 21:13:02 +03:00

cpu_start.c

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

crosscore_int.c

component/soc : move dport access header files to soc

2017-05-09 18:06:00 +08:00

dport_access.c

dport access: introduce pause/resume instead of deinit

2017-09-01 10:36:14 +08:00

dport_panic_highint_hdl.S

Merge panic and dport high level interrupt code to both use int level 4

2017-07-07 12:51:33 +08:00

esp_timer_esp32.c

esp_timer: lock-free implementation of esp_timer_get_time

2017-09-01 10:34:36 +08:00

esp_timer_impl.h

esp_timer: add high resolution software timer API

2017-08-28 11:35:26 +08:00

esp_timer.c

esp_timer: return signed timestamp (int64_t)

2017-09-01 10:34:36 +08:00

esp_timer.h

esp_timer: return signed timestamp (int64_t)

2017-09-01 10:34:36 +08:00

ets_timer_legacy.c

esp_timer: add high resolution software timer API

2017-08-28 11:35:26 +08:00

event_default_handlers.c

tcpip_adapter/lwip: optimize wifi/ip event

2017-08-21 14:36:44 +08:00

event_loop.c

esp_event_send: check if the event loop is initialized

2017-06-05 11:01:26 +08:00

fast_crypto_ops.c

Add the fast crypto function in supplicant

2017-08-09 21:36:13 +08:00

freertos_hooks.c

Add comments/headers according to merge request comments

2016-11-15 12:10:02 +08:00

gdbstub.c

Fix small bug in gdbstub where it sometimes would not return a valid stop reason, timing out gdb. Also clean up the code a bit.

2016-12-02 17:42:11 +08:00

hw_random.c

esp_random: Add some documentation about using before RF subsystem is on

2017-07-11 14:27:20 +08:00

int_wdt.c

driver: timer

2016-11-23 17:23:21 +08:00

intr_alloc.c

soc: release interrupts which are not reserved by timers any more

2017-08-28 11:35:27 +08:00

ipc.c

startup: Add assertion checks around various initialisation sequences

2017-07-12 13:06:56 +08:00

Kconfig

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

lib_printf.c

uart_tx_wait_idle: fix issue with last character not transmitted

2016-12-08 01:42:37 +08:00

libhal.a

Initial public version

2016-08-17 23:08:22 +08:00

libstdcc++-cache-workaround.a

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

Makefile.projbuild

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

panic.c

dport access: introduce pause/resume instead of deinit

2017-09-01 10:36:14 +08:00

phy_init_data.h

phy init data update

2016-12-19 14:23:39 +08:00

phy_init.c

kconfig: Remove Wi-Fi on/off as a menuconfig option

2017-08-16 15:55:28 +05:30

phy.h

soc: add source code of rtc_clk, rtc_pm

2017-04-11 15:45:54 +08:00

restore.c

esp_system: remove link time dependency on WiFi stack

2017-06-15 18:15:36 +08:00

sleep_modes.c

deep sleep: don't use protected DPORT access in wake stub

2017-09-01 18:35:42 +08:00

spiram_psram.c

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

spiram_psram.h

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

spiram.c

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

2017-09-04 12:05:49 +08:00

system_api.c

dport access: introduce pause/resume instead of deinit

2017-09-01 10:36:14 +08:00

task_wdt.c

startup: Add assertion checks around various initialisation sequences

2017-07-12 13:06:56 +08:00

wifi_init.c

wifi: refactor code to match ethernet's init function structure

2017-08-18 08:33:02 +05:30