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4addf21286
Starting with ESP32-P4 we can have targets that have more than 1 USB-OTG peripheral. This commit adds an option to choose which peripherals will be used by USB Host lib. Internally, we will still have only 1 Root HUB but with multiple Root ports. # Conflicts: # components/usb/host_test/usb_host_layer_test/main/usb_host_install_unit_test.cpp # components/usb/hub.c # components/usb/test_apps/common/phy_common.c # components/usb/test_apps/common/phy_common.h # components/usb/test_apps/hcd/main/test_hcd_common.c # components/usb/test_apps/usb_host/main/test_app_main.c # components/usb/usb_host.c
USB-OTG Examples
See the README.md file in the upper level examples directory for more information about examples.
Common Pin Assignments
Pin assignment is only needed for ESP chips that have a USB-OTG peripheral. If your board doesn't have a USB connector connected to the USB-OTG dedicated GPIOs, you may have to DIY a cable and connect D+ and D- to the pins listed below.
ESP BOARD USB CONNECTOR (type A)
--
| || VBUS (5V)
[USB_DM] ------> | || D-
[USB_DP] ------> | || D+
| || GND
--
USB PHY pin mapping
| USB_DP | USB_DM | |
|---|---|---|
| ESP32-S2/S3 | GPIO20 | GPIO19 |
| ESP32-P4 2.0 | pin 50 | pin 49 |
| ESP32-P4 1.1 | GPIO27 | GPIO26 |
Note: On the ESP32-P4, the USB 2.0 PHY pins are dedicated to USB-OTG functionality and cannot be used as general-purpose GPIOs.