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555 lines
14 KiB
C
555 lines
14 KiB
C
/**
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* \brief AES block cipher, ESP DMA hardware accelerated version
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* Based on mbedTLS FIPS-197 compliant version.
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*
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* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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* Additions Copyright (C) 2016-2020, Espressif Systems (Shanghai) PTE Ltd
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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/*
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* The AES block cipher was designed by Vincent Rijmen and Joan Daemen.
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*
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* http://csrc.nist.gov/encryption/aes/rijndael/Rijndael.pdf
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* http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf
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*/
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#include <string.h>
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#include "mbedtls/aes.h"
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#include "esp_log.h"
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#include "esp_crypto_lock.h"
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#include "hal/aes_hal.h"
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#include "hal/aes_ll.h"
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#include "esp_aes_internal.h"
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#include "esp_private/esp_crypto_lock_internal.h"
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#if SOC_AES_GDMA
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#if !ESP_TEE_BUILD
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#define AES_LOCK() esp_crypto_sha_aes_lock_acquire()
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#define AES_RELEASE() esp_crypto_sha_aes_lock_release()
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#else
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#define AES_RCC_ATOMIC()
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#define AES_LOCK()
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#define AES_RELEASE()
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#endif
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#elif SOC_AES_CRYPTO_DMA
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#define AES_LOCK() esp_crypto_dma_lock_acquire()
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#define AES_RELEASE() esp_crypto_dma_lock_release()
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#include "hal/crypto_dma_ll.h"
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#endif
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static const char *TAG = "esp-aes";
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void esp_aes_acquire_hardware( void )
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{
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/* Released by esp_aes_release_hardware()*/
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AES_LOCK();
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AES_RCC_ATOMIC() {
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aes_ll_enable_bus_clock(true);
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#if SOC_AES_CRYPTO_DMA
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crypto_dma_ll_enable_bus_clock(true);
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#endif
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aes_ll_reset_register();
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#if SOC_AES_CRYPTO_DMA
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crypto_dma_ll_reset_register();
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#endif
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}
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}
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/* Function to disable AES and Crypto DMA clocks and release locks */
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void esp_aes_release_hardware( void )
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{
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AES_RCC_ATOMIC() {
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aes_ll_enable_bus_clock(false);
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#if SOC_AES_CRYPTO_DMA
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crypto_dma_ll_enable_bus_clock(false);
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#endif
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}
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AES_RELEASE();
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}
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static int esp_aes_validate_input(esp_aes_context *ctx, const unsigned char *input,
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unsigned char *output )
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{
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if (!ctx) {
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ESP_LOGE(TAG, "No AES context supplied");
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return -1;
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}
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if (!input) {
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ESP_LOGE(TAG, "No input supplied");
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return -1;
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}
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if (!output) {
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ESP_LOGE(TAG, "No output supplied");
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return -1;
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}
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return 0;
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}
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/*
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* AES-ECB single block encryption
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*/
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int esp_internal_aes_encrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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int r = -1;
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_ENCRYPT);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_ECB);
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r = esp_aes_process_dma(ctx, input, output, AES_BLOCK_BYTES, NULL);
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esp_aes_release_hardware();
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return r;
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}
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void esp_aes_encrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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esp_internal_aes_encrypt(ctx, input, output);
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}
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/*
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* AES-ECB single block decryption
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*/
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int esp_internal_aes_decrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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int r = -1;
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_DECRYPT);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_ECB);
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r = esp_aes_process_dma(ctx, input, output, AES_BLOCK_BYTES, NULL);
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esp_aes_release_hardware();
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return r;
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}
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void esp_aes_decrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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esp_internal_aes_decrypt(ctx, input, output);
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}
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/*
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* AES-ECB block encryption/decryption
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*/
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int esp_aes_crypt_ecb(esp_aes_context *ctx,
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int mode,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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int r = -1;
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, mode);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_ECB);
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r = esp_aes_process_dma(ctx, input, output, AES_BLOCK_BYTES, NULL);
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esp_aes_release_hardware();
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return r;
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}
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/*
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* AES-CBC buffer encryption/decryption
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*/
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int esp_aes_crypt_cbc(esp_aes_context *ctx,
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int mode,
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size_t length,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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int r = -1;
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!iv) {
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ESP_LOGE(TAG, "No IV supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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/* For CBC input length should be multiple of
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* AES BLOCK BYTES
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* */
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if ( (length % AES_BLOCK_BYTES) || (length == 0) ) {
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return ERR_ESP_AES_INVALID_INPUT_LENGTH;
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, mode);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_CBC);
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aes_hal_set_iv(iv);
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r = esp_aes_process_dma(ctx, input, output, length, NULL);
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if (r != 0) {
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goto cleanup;
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}
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aes_hal_read_iv(iv);
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cleanup:
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esp_aes_release_hardware();
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return r;
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}
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/*
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* AES-CFB8 buffer encryption/decryption
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*/
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int esp_aes_crypt_cfb8(esp_aes_context *ctx,
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int mode,
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size_t length,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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int r = -1;
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unsigned char c;
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unsigned char ov[17];
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size_t block_bytes = length - (length % AES_BLOCK_BYTES);
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!iv) {
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ESP_LOGE(TAG, "No IV supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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/* The DMA engine will only output correct IV if it runs
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full blocks of input in CFB8 mode
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*/
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esp_aes_acquire_hardware();
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if (block_bytes > 0) {
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, mode);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_CFB8);
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aes_hal_set_iv(iv);
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r = esp_aes_process_dma(ctx, input, output, block_bytes, NULL);
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if (r != 0) {
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goto cleanup;
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}
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aes_hal_read_iv(iv);
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length -= block_bytes;
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input += block_bytes;
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output += block_bytes;
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}
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// Process remaining bytes block-at-a-time in ECB mode
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if (length > 0) {
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, MBEDTLS_AES_ENCRYPT);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_ECB);
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while ( length-- ) {
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memcpy( ov, iv, 16 );
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r = esp_aes_process_dma(ctx, iv, iv, AES_BLOCK_BYTES, NULL);
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if (r != 0) {
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goto cleanup;
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}
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if ( mode == MBEDTLS_AES_DECRYPT ) {
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ov[16] = *input;
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}
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c = *output++ = ( iv[0] ^ *input++ );
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if ( mode == MBEDTLS_AES_ENCRYPT ) {
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ov[16] = c;
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}
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memcpy( iv, ov + 1, 16 );
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}
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}
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r = 0;
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cleanup:
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esp_aes_release_hardware();
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return r;
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}
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/*
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* AES-CFB128 buffer encryption/decryption
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*/
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int esp_aes_crypt_cfb128(esp_aes_context *ctx,
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int mode,
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size_t length,
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size_t *iv_off,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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uint8_t c;
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size_t stream_bytes = 0;
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size_t n;
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!iv) {
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ESP_LOGE(TAG, "No IV supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!iv_off) {
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ESP_LOGE(TAG, "No IV offset supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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n = *iv_off;
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/* First process the *iv_off bytes
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* which are pending from the previous call to this API
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*/
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while (n > 0 && length > 0) {
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if (mode == MBEDTLS_AES_ENCRYPT) {
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iv[n] = *output++ = *input++ ^ iv[n];
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} else {
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c = *input++;
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*output++ = c ^ iv[n];
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iv[n] = c;
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}
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n = (n + 1) % AES_BLOCK_BYTES;
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length--;
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}
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if (length > 0) {
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stream_bytes = length % AES_BLOCK_BYTES;
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, mode);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_CFB128);
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aes_hal_set_iv(iv);
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int r = esp_aes_process_dma(ctx, input, output, length, iv);
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if (r != 0) {
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esp_aes_release_hardware();
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return r;
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}
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if (stream_bytes == 0) {
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// if we didn't need the partial 'stream block' then the new IV is in the IV register
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aes_hal_read_iv(iv);
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} else {
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// if we did process a final partial block the new IV is already processed via DMA (and has some bytes of output in it),
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// In decrypt mode any partial bytes are output plaintext (iv ^ c) and need to be swapped back to ciphertext (as the next
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// block uses ciphertext as its IV input)
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//
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// Note: It may be more efficient to not process the partial block via DMA in this case.
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if (mode == MBEDTLS_AES_DECRYPT) {
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memcpy(iv, input + length - stream_bytes, stream_bytes);
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}
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}
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esp_aes_release_hardware();
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}
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*iv_off = n + stream_bytes;
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return 0;
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}
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/*
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* AES-OFB (Output Feedback Mode) buffer encryption/decryption
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*/
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int esp_aes_crypt_ofb(esp_aes_context *ctx,
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size_t length,
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size_t *iv_off,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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size_t n;
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size_t stream_bytes = 0;
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!iv) {
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ESP_LOGE(TAG, "No IV supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!iv_off) {
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ESP_LOGE(TAG, "No IV offset supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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n = *iv_off;
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/* If there is an offset then use the output of the previous AES block
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(the updated IV) to calculate the new output */
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while (n > 0 && length > 0) {
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*output++ = (*input++ ^ iv[n]);
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n = (n + 1) & 0xF;
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length--;
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}
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if (length > 0) {
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stream_bytes = (length % AES_BLOCK_BYTES);
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_DECRYPT);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_OFB);
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aes_hal_set_iv(iv);
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int r = esp_aes_process_dma(ctx, input, output, length, iv);
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if (r != 0) {
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esp_aes_release_hardware();
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return r;
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}
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aes_hal_read_iv(iv);
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esp_aes_release_hardware();
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}
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*iv_off = n + stream_bytes;
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return 0;
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}
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/*
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* AES-CTR buffer encryption/decryption
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*/
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int esp_aes_crypt_ctr(esp_aes_context *ctx,
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size_t length,
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size_t *nc_off,
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unsigned char nonce_counter[16],
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unsigned char stream_block[16],
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const unsigned char *input,
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unsigned char *output )
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{
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size_t n;
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if (esp_aes_validate_input(ctx, input, output)) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!stream_block) {
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ESP_LOGE(TAG, "No stream supplied");
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return -1;
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}
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if (!nonce_counter) {
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ESP_LOGE(TAG, "No nonce supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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if (!nc_off) {
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ESP_LOGE(TAG, "No nonce offset supplied");
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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n = *nc_off;
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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/* Process any unprocessed bytes left in stream block from
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last operation */
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while (n > 0 && length > 0) {
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*output++ = (unsigned char)(*input++ ^ stream_block[n]);
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n = (n + 1) & 0xF;
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length--;
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}
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if (length > 0) {
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_DECRYPT);
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aes_hal_mode_init(ESP_AES_BLOCK_MODE_CTR);
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aes_hal_set_iv(nonce_counter);
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int r = esp_aes_process_dma(ctx, input, output, length, stream_block);
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|
|
|
if (r != 0) {
|
|
esp_aes_release_hardware();
|
|
return r;
|
|
}
|
|
|
|
aes_hal_read_iv(nonce_counter);
|
|
|
|
esp_aes_release_hardware();
|
|
|
|
}
|
|
*nc_off = n + (length % AES_BLOCK_BYTES);
|
|
|
|
return 0;
|
|
}
|