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esp-idf/examples/system
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Nebojsa Cvetkovic d0ceef20f4 refactor(xtensa): Rename specreg.h register macros 
This commit renames all registers in xtensa/specreg.h to by adding the
prefix XT_REG_. This is done to avoid naming collisions with similar
variable names. A new register file, viz., xt_specreg.h is created. The
previous names are still available to use but have been deprecated.

Closes https://github.com/espressif/esp-idf/issues/12723
Merges https://github.com/espressif/esp-idf/pull/16040
2025-06-17 15:37:33 +02:00
..
app_trace_basic
Revert "ci: OpenOCD class as fixture"
2025-05-28 08:38:08 +02:00
app_trace_to_plot
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
base_mac_address
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
console
docs: Fix some typos
2025-04-30 18:35:39 +08:00
deep_sleep
refactor(touch): separate touch sleep example
2025-04-25 23:57:14 +08:00
deep_sleep_wake_stub
test: format all test scripts
2025-03-05 12:08:48 +08:00
efuse
fix(examples): Fix CI tests for secure boot cases
2025-05-13 19:20:22 +03:00
esp_event
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
esp_timer
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
eventfd
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
flash_suspend
test(spi_flash): Flash suspend test evolution
2025-03-11 16:21:07 +08:00
freertos
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
gcov
Revert "ci: OpenOCD class as fixture"
2025-05-28 08:38:08 +02:00
gdbstub
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
heap_task_tracking
refactor(flash): spilt flash cap in esp_rom
2025-03-28 15:04:25 +08:00
himem
test: format all test scripts
2025-03-05 12:08:48 +08:00
ipc/ipc_isr
test: format all test scripts
2025-03-05 12:08:48 +08:00
light_sleep
refactor(uart): minor refactor to uart wakeup code
2025-05-15 11:20:59 +08:00
nmi_isr
refactor(xtensa): Rename specreg.h register macros
2025-06-17 15:37:33 +02:00
ota
feat(bootloader): Bootloader OTA update with recovery bootloader feat
2025-06-12 18:47:33 +08:00
perfmon
test: format all test scripts
2025-03-05 12:08:48 +08:00
pthread
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
rt_mqueue
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
select
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
startup_time
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
sysview_tracing
fix(sysview): fixed spelling mistake in comment
2025-05-28 08:46:26 +02:00
sysview_tracing_heap_log
Revert "ci: enable sysview examples for all chips"
2025-05-28 08:38:08 +02:00
task_watchdog
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
ulp
feat(ulp): updated to reflect eco2 ulp changes
2025-05-12 10:22:20 +08:00
unit_test
feat(esp32h4): enable ESP32H4 ci build
2025-03-28 14:41:28 +08:00
xip_from_psram
test: format all test scripts
2025-03-05 12:08:48 +08:00
.build-test-rules.yml
feat(bootloader): Bootloader OTA update with recovery bootloader feat
2025-06-12 18:47:33 +08:00
README.md
feat(pm): support basic pmu sleep
2024-09-10 10:44:13 +08:00

README.md

Supported Targets ESP32 ESP32-C2 ESP32-C3 ESP32-C5 ESP32-C6 ESP32-C61 ESP32-H2 ESP32-P4 ESP32-S2 ESP32-S3

System Examples

Configuration and management of memory, interrupts, WDT (watchdog timer), OTA (over the air updates), deep sleep logging, and event loops.

See the README.md file in the upper level examples directory for more information about examples.