Omar Chebib 78a94dbb6c freertos: Fix delay between interrupt request and trigger on RISC-V ...

NOP instructions have been added in order to prevent the code
from executing code it shouldn't execute. This is due to a delay
between the moment an interrupt is requested and the moment it
is fired. It only happens on RISC-V SoC.

2021-02-25 06:57:59 +00:00

..

riscv

freertos: Fix delay between interrupt request and trigger on RISC-V

2021-02-25 06:57:59 +00:00

xtensa

system: enable shared stack watchpoint

2021-02-18 15:38:30 +08:00

port_common.c

freertos: Add RISC-V port

2020-11-13 07:49:11 +11:00