Files
esp-idf/components/soc/esp32p4
morris cd1ce6164b Merge branch 'refactor/fine_tune_dphy_pll_v5.4' into 'release/v5.4'
feat(mipi): fine tune DPHY PLL clock (v5.4)

See merge request espressif/esp-idf!35291
2025-01-06 13:20:01 +08:00
..
2024-10-18 14:14:16 +08:00