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https://github.com/espressif/esp-idf.git
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179 lines
6.0 KiB
C
179 lines
6.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include "soc/hp_sys_clkrst_struct.h"
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#include "hal/misc.h"
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#include "hal/mipi_dsi_host_ll.h"
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#include "hal/mipi_dsi_brg_ll.h"
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#include "hal/mipi_dsi_phy_ll.h"
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#define MIPI_DSI_LL_NUM_BUS 1 // support only 1 MIPI DSI bus
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#define MIPI_DSI_LL_MAX_DATA_LANES 2 // support up to 2 data lanes
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Enable the bus clock for MIPI DSI module
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*
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* @param group_id Group ID
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* @param enable true to enable, false to disable
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*/
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static inline void _mipi_dsi_ll_enable_bus_clock(int group_id, bool enable)
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{
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(void)group_id;
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HP_SYS_CLKRST.soc_clk_ctrl1.reg_dsi_sys_clk_en = enable;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _mipi_dsi_ll_enable_bus_clock(__VA_ARGS__)
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/**
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* @brief Reset the MIPI DSI module
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*
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* @param group_id Group ID
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*/
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static inline void mipi_dsi_ll_reset_register(int group_id)
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{
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(void)group_id;
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HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_dsi_brg = 1;
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HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_dsi_brg = 0;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mipi_dsi_ll_reset_register(__VA_ARGS__)
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/**
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* @brief Enable MIPI DSI DPI clock
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*
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* @param group_id Group ID
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* @param enable true to enable, false to disable
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*/
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static inline void mipi_dsi_ll_enable_dpi_clock(int group_id, bool enable)
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{
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(void)group_id;
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HP_SYS_CLKRST.peri_clk_ctrl03.reg_mipi_dsi_dpiclk_en = enable;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_enable_dpi_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mipi_dsi_ll_enable_dpi_clock(__VA_ARGS__)
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/**
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* @brief Set the clock source for the DSI DPI interface
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*
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* @param group_id Group ID
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* @param source Clock source
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*/
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static inline void mipi_dsi_ll_set_dpi_clock_source(int group_id, mipi_dsi_dpi_clock_source_t source)
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{
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(void)group_id;
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switch (source) {
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case MIPI_DSI_DPI_CLK_SRC_XTAL:
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HP_SYS_CLKRST.peri_clk_ctrl03.reg_mipi_dsi_dpiclk_src_sel = 0;
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break;
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case MIPI_DSI_DPI_CLK_SRC_PLL_F160M:
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HP_SYS_CLKRST.peri_clk_ctrl03.reg_mipi_dsi_dpiclk_src_sel = 2;
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break;
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case MIPI_DSI_DPI_CLK_SRC_PLL_F240M:
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HP_SYS_CLKRST.peri_clk_ctrl03.reg_mipi_dsi_dpiclk_src_sel = 1;
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break;
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default:
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abort();
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}
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_set_dpi_clock_source(...) (void)__DECLARE_RCC_ATOMIC_ENV; mipi_dsi_ll_set_dpi_clock_source(__VA_ARGS__)
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/**
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* @brief Set the clock division factor for the DPI clock source
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*
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* @param group_id Group ID
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* @param div Division factor
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*/
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static inline void mipi_dsi_ll_set_dpi_clock_div(int group_id, uint32_t div)
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{
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(void)group_id;
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HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl03, reg_mipi_dsi_dpiclk_div_num, div - 1);
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_set_dpi_clock_div(...) (void)__DECLARE_RCC_ATOMIC_ENV; mipi_dsi_ll_set_dpi_clock_div(__VA_ARGS__)
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/**
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* @brief Enable MIPI DSI PHY configuration clock
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*
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* @param group_id Group ID
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* @param enable true to enable, false to disable
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*/
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static inline void mipi_dsi_ll_enable_phy_config_clock(int group_id, bool enable)
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{
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(void)group_id;
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HP_SYS_CLKRST.peri_clk_ctrl03.reg_mipi_dsi_dphy_cfg_clk_en = enable;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_enable_phy_config_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mipi_dsi_ll_enable_phy_config_clock(__VA_ARGS__)
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/**
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* @brief Enable MIPI DSI PHY PLL reference clock
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*
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* @param group_id Group ID
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* @param enable true to enable, false to disable
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*/
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static inline void mipi_dsi_ll_enable_phy_reference_clock(int group_id, bool enable)
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{
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(void)group_id;
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HP_SYS_CLKRST.peri_clk_ctrl03.reg_mipi_dsi_dphy_pll_refclk_en = enable;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_enable_phy_reference_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mipi_dsi_ll_enable_phy_reference_clock(__VA_ARGS__)
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/**
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* @brief Set the clock source for the DSI PHY interface
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*
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* @param group_id Group ID
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* @param source Clock source
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*/
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static inline void mipi_dsi_ll_set_phy_clock_source(int group_id, mipi_dsi_phy_clock_source_t source)
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{
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(void)group_id;
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switch (source) {
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case MIPI_DSI_PHY_CLK_SRC_PLL_F20M:
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HP_SYS_CLKRST.peri_clk_ctrl02.reg_mipi_dsi_dphy_clk_src_sel = 0;
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break;
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case MIPI_DSI_PHY_CLK_SRC_RC_FAST:
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HP_SYS_CLKRST.peri_clk_ctrl02.reg_mipi_dsi_dphy_clk_src_sel = 1;
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break;
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case MIPI_DSI_PHY_CLK_SRC_PLL_F25M:
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HP_SYS_CLKRST.peri_clk_ctrl02.reg_mipi_dsi_dphy_clk_src_sel = 2;
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break;
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default:
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abort();
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}
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define mipi_dsi_ll_set_phy_clock_source(...) (void)__DECLARE_RCC_ATOMIC_ENV; mipi_dsi_ll_set_phy_clock_source(__VA_ARGS__)
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#ifdef __cplusplus
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}
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#endif
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