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49 lines
1.8 KiB
C
49 lines
1.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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// MSPI IOMUX PINs
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// On P4, SPI pins defined here are all wrong. these pins are individual pins, don't use normal GPIO pins anymore.
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// Please check iomux_mspi_pin_struct/reg.h
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#define GPIO_NUM_INVALID -1
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#define MSPI_IOMUX_PIN_NUM_CS1 GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_HD GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_WP GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_CS0 GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_CLK GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_MISO GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_MOSI GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_D4 GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_D5 GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_D6 GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_D7 GPIO_NUM_INVALID
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#define MSPI_IOMUX_PIN_NUM_DQS GPIO_NUM_INVALID
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// Normal IOMUX pins
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#define SPI2_FUNC_NUM 3
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#define SPI2_IOMUX_PIN_NUM_HD 6
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#define SPI2_IOMUX_PIN_NUM_CS 7
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#define SPI2_IOMUX_PIN_NUM_MOSI 8
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#define SPI2_IOMUX_PIN_NUM_CLK 9
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#define SPI2_IOMUX_PIN_NUM_MISO 10
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#define SPI2_IOMUX_PIN_NUM_WP 11
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// When using Octal SPI, we make use of SPI2_FUNC_NUM_OCT to route them as follows.
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#define SPI2_FUNC_NUM_OCT 2
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#define SPI2_IOMUX_PIN_NUM_HD_OCT 32
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#define SPI2_IOMUX_PIN_NUM_CS_OCT 28
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#define SPI2_IOMUX_PIN_NUM_MOSI_OCT 29
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#define SPI2_IOMUX_PIN_NUM_CLK_OCT 30
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#define SPI2_IOMUX_PIN_NUM_MISO_OCT 31
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#define SPI2_IOMUX_PIN_NUM_WP_OCT 33
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#define SPI2_IOMUX_PIN_NUM_IO4_OCT 34
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#define SPI2_IOMUX_PIN_NUM_IO5_OCT 35
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#define SPI2_IOMUX_PIN_NUM_IO6_OCT 36
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#define SPI2_IOMUX_PIN_NUM_IO7_OCT 37
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//SPI3 have no iomux pins
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