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https://github.com/espressif/esp-idf.git
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05e149ea78
feat: add ecdsa-p384 testcases and relative support for ESP32C5 ECO2 Closes IDF-13008 and IDF-12630 See merge request espressif/esp-idf!38857
258 lines
7.7 KiB
C
258 lines
7.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/assert.h"
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#include "hal/ecdsa_ll.h"
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#include "hal/ecdsa_hal.h"
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#include "hal/efuse_hal.h"
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#include "soc/soc_caps.h"
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#if HAL_CONFIG(ECDSA_GEN_SIG_CM)
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#include "esp_fault.h"
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#include "esp_random.h"
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#include "soc/chip_revision.h"
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#endif
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#ifdef SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
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#include "hal/key_mgr_hal.h"
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#endif
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#define ECDSA_HAL_P192_COMPONENT_LEN 24
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#define ECDSA_HAL_P256_COMPONENT_LEN 32
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#if SOC_ECDSA_SUPPORT_CURVE_P384
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#define ECDSA_HAL_P384_COMPONENT_LEN 48
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#endif /* SOC_ECDSA_SUPPORT_CURVE_P384 */
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static void configure_ecdsa_periph(ecdsa_hal_config_t *conf)
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{
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if (conf->use_km_key == 0) {
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efuse_hal_set_ecdsa_key(conf->curve, conf->efuse_key_blk);
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
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// Force Key Manager to use eFuse key for XTS-AES operation
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if (conf->curve == ECDSA_CURVE_SECP192R1) {
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key_mgr_hal_set_key_usage(ESP_KEY_MGR_ECDSA_192_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
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} else {
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key_mgr_hal_set_key_usage(ESP_KEY_MGR_ECDSA_256_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
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}
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#endif
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}
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#if SOC_KEY_MANAGER_SUPPORTED
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else {
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if (conf->curve == ECDSA_CURVE_SECP192R1) {
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key_mgr_hal_set_key_usage(ESP_KEY_MGR_ECDSA_192_KEY, ESP_KEY_MGR_USE_OWN_KEY);
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} else {
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key_mgr_hal_set_key_usage(ESP_KEY_MGR_ECDSA_256_KEY, ESP_KEY_MGR_USE_OWN_KEY);
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}
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}
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#endif
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ecdsa_ll_set_mode(conf->mode);
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ecdsa_ll_set_curve(conf->curve);
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if (conf->mode != ECDSA_MODE_EXPORT_PUBKEY) {
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ecdsa_ll_set_z_mode(conf->sha_mode);
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}
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#if SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE
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if (ecdsa_ll_is_deterministic_mode_supported()) {
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ecdsa_ll_set_k_type(conf->sign_type);
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#if !SOC_ECDSA_SUPPORT_HW_DETERMINISTIC_LOOP
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if (conf->sign_type == ECDSA_K_TYPE_DETERMINISITIC) {
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ecdsa_ll_set_deterministic_loop(conf->loop_number);
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}
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#endif /* !SOC_ECDSA_SUPPORT_HW_DETERMINISTIC_LOOP */
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}
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#endif
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}
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bool ecdsa_hal_get_operation_result(void)
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{
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return ecdsa_ll_get_operation_result();
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}
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static void ecdsa_hal_gen_signature_inner(const uint8_t *hash, uint8_t *r_out,
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uint8_t *s_out, uint16_t len)
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{
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ecdsa_ll_set_stage(ECDSA_STAGE_START_CALC);
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while(ecdsa_ll_get_state() != ECDSA_STATE_LOAD) {
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;
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}
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ecdsa_ll_write_param(ECDSA_PARAM_Z, hash, len);
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ecdsa_ll_set_stage(ECDSA_STAGE_LOAD_DONE);
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while (ecdsa_ll_get_state() != ECDSA_STATE_GET) {
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;
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}
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ecdsa_ll_read_param(ECDSA_PARAM_R, r_out, len);
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ecdsa_ll_read_param(ECDSA_PARAM_S, s_out, len);
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ecdsa_ll_set_stage(ECDSA_STAGE_GET_DONE);
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while (ecdsa_ll_get_state() != ECDSA_STATE_IDLE) {
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;
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}
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}
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#if HAL_CONFIG(ECDSA_GEN_SIG_CM)
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__attribute__((optimize("O0"))) static void ecdsa_hal_gen_signature_with_countermeasure(const uint8_t *hash, uint8_t *r_out,
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uint8_t *s_out, uint16_t len)
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{
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uint8_t tmp_r_out[32] = {};
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uint8_t tmp_s_out[32] = {};
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uint8_t tmp_hash[64] = {};
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uint8_t dummy_op_count_prior = esp_random() % ECDSA_SIGN_MAX_DUMMY_OP_COUNT;
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uint8_t dummy_op_count_later = ECDSA_SIGN_MAX_DUMMY_OP_COUNT - dummy_op_count_prior;
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ESP_FAULT_ASSERT((dummy_op_count_prior != 0) || (dummy_op_count_later != 0));
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ESP_FAULT_ASSERT(dummy_op_count_prior + dummy_op_count_later == ECDSA_SIGN_MAX_DUMMY_OP_COUNT);
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esp_fill_random(tmp_hash, 64);
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/* Dummy ecdsa signature operations prior to the actual one */
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for (int i = 0; i < dummy_op_count_prior; i++) {
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ecdsa_hal_gen_signature_inner(tmp_hash + ((6 * i) % 32), (uint8_t *) tmp_r_out, (uint8_t *) tmp_s_out, len);
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}
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/* Actual ecdsa signature operation */
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ecdsa_hal_gen_signature_inner(hash, r_out, s_out, len);
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/* Dummy ecdsa signature operations after the actual one */
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for (int i = 0; i < dummy_op_count_later; i++) {
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ecdsa_hal_gen_signature_inner(tmp_hash + ((6 * i) % 32), (uint8_t *)tmp_r_out, (uint8_t *)tmp_s_out, len);
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}
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}
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#endif /* HAL_CONFIG_ECDSA_GEN_SIG_CM */
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void ecdsa_hal_gen_signature(ecdsa_hal_config_t *conf, const uint8_t *hash,
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uint8_t *r_out, uint8_t *s_out, uint16_t len)
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{
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if (len != ECDSA_HAL_P192_COMPONENT_LEN && len != ECDSA_HAL_P256_COMPONENT_LEN
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#if SOC_ECDSA_SUPPORT_CURVE_P384
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&& len != ECDSA_HAL_P384_COMPONENT_LEN
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#endif /* SOC_ECDSA_SUPPORT_CURVE_P384 */
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) {
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HAL_ASSERT(false && "Incorrect length");
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}
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if (conf->sha_mode == ECDSA_Z_USER_PROVIDED && hash == NULL) {
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HAL_ASSERT(false && "Mismatch in SHA configuration");
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}
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if (ecdsa_ll_get_state() != ECDSA_STATE_IDLE) {
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HAL_ASSERT(false && "Incorrect ECDSA state");
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}
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configure_ecdsa_periph(conf);
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#if HAL_CONFIG(ECDSA_GEN_SIG_CM)
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#if SOC_IS(ESP32H2)
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if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 102)) {
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ecdsa_hal_gen_signature_with_countermeasure(hash, r_out, s_out, len);
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return;
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}
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#endif
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ecdsa_hal_gen_signature_with_countermeasure(hash, r_out, s_out, len);
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#else /* HAL_CONFIG_ECDSA_GEN_SIG_CM */
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ecdsa_hal_gen_signature_inner(hash, r_out, s_out, len);
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#endif /* !HAL_CONFIG_ECDSA_GEN_SIG_CM */
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}
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int ecdsa_hal_verify_signature(ecdsa_hal_config_t *conf, const uint8_t *hash, const uint8_t *r, const uint8_t *s,
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const uint8_t *pub_x, const uint8_t *pub_y, uint16_t len)
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{
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if (len != ECDSA_HAL_P192_COMPONENT_LEN && len != ECDSA_HAL_P256_COMPONENT_LEN
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#if SOC_ECDSA_SUPPORT_CURVE_P384
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&& len != ECDSA_HAL_P384_COMPONENT_LEN
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#endif /* SOC_ECDSA_SUPPORT_CURVE_P384 */
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) {
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HAL_ASSERT(false && "Incorrect length");
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}
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if (ecdsa_ll_get_state() != ECDSA_STATE_IDLE) {
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HAL_ASSERT(false && "Incorrect ECDSA state");
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}
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configure_ecdsa_periph(conf);
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ecdsa_ll_set_stage(ECDSA_STAGE_START_CALC);
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while(ecdsa_ll_get_state() != ECDSA_STATE_LOAD) {
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;
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}
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ecdsa_ll_write_param(ECDSA_PARAM_Z, hash, len);
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ecdsa_ll_write_param(ECDSA_PARAM_R, r, len);
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ecdsa_ll_write_param(ECDSA_PARAM_S, s, len);
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ecdsa_ll_write_param(ECDSA_PARAM_QAX, pub_x, len);
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ecdsa_ll_write_param(ECDSA_PARAM_QAY, pub_y, len);
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ecdsa_ll_set_stage(ECDSA_STAGE_LOAD_DONE);
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while (ecdsa_ll_get_state() != ECDSA_STATE_IDLE) {
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;
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}
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bool res = ecdsa_hal_get_operation_result();
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return (res ? 0 : -1);
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}
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#ifdef SOC_ECDSA_SUPPORT_EXPORT_PUBKEY
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void ecdsa_hal_export_pubkey(ecdsa_hal_config_t *conf, uint8_t *pub_x, uint8_t *pub_y, uint16_t len)
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{
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if (len != ECDSA_HAL_P192_COMPONENT_LEN && len != ECDSA_HAL_P256_COMPONENT_LEN
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#if SOC_ECDSA_SUPPORT_CURVE_P384
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&& len != ECDSA_HAL_P384_COMPONENT_LEN
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#endif /* SOC_ECDSA_SUPPORT_CURVE_P384 */
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) {
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HAL_ASSERT(false && "Incorrect length");
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}
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if (ecdsa_ll_get_state() != ECDSA_STATE_IDLE) {
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HAL_ASSERT(false && "Incorrect ECDSA state");
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}
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configure_ecdsa_periph(conf);
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ecdsa_ll_set_stage(ECDSA_STAGE_START_CALC);
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while(ecdsa_ll_get_state() != ECDSA_STATE_LOAD) {
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;
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}
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ecdsa_ll_set_stage(ECDSA_STAGE_LOAD_DONE);
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while (ecdsa_ll_get_state() != ECDSA_STATE_GET) {
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;
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}
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ecdsa_ll_read_param(ECDSA_PARAM_QAX, pub_x, len);
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ecdsa_ll_read_param(ECDSA_PARAM_QAY, pub_y, len);
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ecdsa_ll_set_stage(ECDSA_STAGE_GET_DONE);
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while (ecdsa_ll_get_state() != ECDSA_STATE_IDLE) {
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;
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}
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}
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#endif /* SOC_ECDSA_SUPPORT_EXPORT_PUBKEY */
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#if SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE && !SOC_ECDSA_SUPPORT_HW_DETERMINISTIC_LOOP
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bool ecdsa_hal_det_signature_k_check(void)
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{
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return (ecdsa_ll_check_k_value() == 0);
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}
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#endif /* SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE && !SOC_ECDSA_SUPPORT_HW_DETERMINISTIC_LOOP */
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