mirror of
https://github.com/espressif/esp-idf.git
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132 lines
4.3 KiB
C
132 lines
4.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* WARNING:
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*
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* This file is shared between the HP and LP cores.
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* Updates to this file should be made carefully and should not include FreeRTOS APIs or other IDF-specific functionalities, such as the interrupt allocator.
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*/
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#include "esp_check.h"
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#include "driver/uart_wakeup.h"
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#include "hal/uart_hal.h"
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#include "esp_private/esp_sleep_internal.h"
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#include "esp_log.h"
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const __attribute__((unused)) static char *TAG = "uart_wakeup";
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#if SOC_UART_WAKEUP_SUPPORT_CHAR_SEQ_MODE
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static esp_err_t uart_char_seq_wk_configure(uart_dev_t *hw, const char* phrase)
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{
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if (phrase == NULL || phrase[0] == '\0') {
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return ESP_ERR_INVALID_ARG;
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}
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esp_err_t ret = ESP_OK;
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uint32_t mask = 0;
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uint32_t index = 0;
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while (index < SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN && phrase[index] != '\0') {
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if (phrase[index] == '*') {
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mask |= 1 << index;
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} else {
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uart_ll_set_char_seq_wk_char(hw, index, phrase[index]);
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}
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index++;
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}
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if (
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index == 0 ||
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phrase[index - 1] == '*' ||
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mask > 0xF
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) {
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return ESP_ERR_INVALID_ARG;
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}
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uart_ll_set_wakeup_char_seq_mask(hw, mask);
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uart_ll_set_wakeup_char_seq_char_num(hw, index - 1);
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return ret;
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}
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#endif
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esp_err_t uart_wakeup_setup(uart_port_t uart_num, const uart_wakeup_cfg_t *cfg)
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{
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ESP_RETURN_ON_FALSE(cfg, ESP_ERR_INVALID_ARG, TAG, "cfg is NULL");
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uart_dev_t *hw = UART_LL_GET_HW(uart_num);
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uart_hal_context_t hal = {
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.dev = hw,
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};
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soc_module_clk_t src_clk;
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uart_hal_get_sclk(&hal, &src_clk);
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if (uart_num < SOC_UART_HP_NUM && cfg->wakeup_mode != UART_WK_MODE_ACTIVE_THRESH) {
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// For wakeup modes except ACTIVE_THRESH, the function clock needs to be exist to trigger wakeup
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ESP_RETURN_ON_FALSE(src_clk == SOC_MOD_CLK_XTAL, ESP_ERR_NOT_SUPPORTED, TAG, "failed to setup uart wakeup due to the clock source is not XTAL!");
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}
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esp_err_t ret = ESP_OK;
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// This should be mocked at ll level if the selection of the UART wakeup mode is not supported by this SOC.
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uart_ll_set_wakeup_mode(hw, cfg->wakeup_mode);
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#if SOC_PM_SUPPORT_PMU_CLK_ICG
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// When hp uarts are utilized, the main XTAL need to be PU and UARTx & IOMX ICG need to be ungate
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if (uart_num < SOC_UART_HP_NUM && cfg->wakeup_mode != UART_WK_MODE_ACTIVE_THRESH) {
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esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
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esp_sleep_clock_config(UART_LL_SLEEP_CLOCK(uart_num), ESP_SLEEP_CLOCK_OPTION_UNGATE);
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esp_sleep_clock_config(ESP_SLEEP_CLOCK_IOMUX, ESP_SLEEP_CLOCK_OPTION_UNGATE);
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}
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#endif
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switch (cfg->wakeup_mode) {
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#if SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE
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case UART_WK_MODE_ACTIVE_THRESH:
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if (cfg->rx_edge_threshold < UART_LL_WAKEUP_EDGE_THRED_MIN || cfg->rx_edge_threshold > UART_LL_WAKEUP_EDGE_THRED_MAX(hw)) {
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ret = ESP_ERR_INVALID_ARG;
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} else {
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uart_ll_set_wakeup_edge_thrd(hw, cfg->rx_edge_threshold);
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}
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break;
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#endif
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#if SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE
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case UART_WK_MODE_FIFO_THRESH:
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if (cfg->rx_fifo_threshold > UART_LL_WAKEUP_FIFO_THRED_MAX(hw)) {
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ret = ESP_ERR_INVALID_ARG;
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} else {
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uart_ll_set_wakeup_fifo_thrd(hw, cfg->rx_fifo_threshold);
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}
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break;
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#endif
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#if SOC_UART_WAKEUP_SUPPORT_START_BIT_MODE
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case UART_WK_MODE_START_BIT:
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break;
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#endif
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#if SOC_UART_WAKEUP_SUPPORT_CHAR_SEQ_MODE
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case UART_WK_MODE_CHAR_SEQ:
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ret = uart_char_seq_wk_configure(hw, cfg->wake_chars_seq);
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break;
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#endif
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default:
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ret = ESP_ERR_INVALID_ARG;
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break;
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}
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return ret;
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}
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esp_err_t uart_wakeup_clear(uart_port_t uart_num, uart_wakeup_mode_t wakeup_mode)
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{
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#if SOC_PM_SUPPORT_PMU_CLK_ICG
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// When hp uarts are utilized, the main XTAL need to be PU and UARTx & IOMX ICG need to be ungate
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if (uart_num < SOC_UART_HP_NUM && wakeup_mode != UART_WK_MODE_ACTIVE_THRESH) {
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esp_sleep_clock_config(UART_LL_SLEEP_CLOCK(uart_num), ESP_SLEEP_CLOCK_OPTION_GATE);
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esp_sleep_clock_config(ESP_SLEEP_CLOCK_IOMUX, ESP_SLEEP_CLOCK_OPTION_GATE);
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esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF);
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}
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#endif
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return ESP_OK;
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}
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