mirror of
https://github.com/espressif/esp-idf.git
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113 lines
2.7 KiB
C
113 lines
2.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for MMU register operations
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#pragma once
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#include "soc/ext_mem_defs.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_access.h"
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#include "hal/assert.h"
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#include "hal/mmu_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Get MMU page size
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*
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* @param mmu_id MMU ID
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*
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* @return MMU page size code
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*/
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__attribute__((always_inline))
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static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
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{
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//On esp32, MMU Page size is always 64KB
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(void)mmu_id;
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return MMU_PAGE_64KB;
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}
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/**
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* Set MMU page size
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*
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* @param size See `mmu_page_size_t`
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*
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* @note On esp32, only supports `MMU_PAGE_64KB`
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*/
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__attribute__((always_inline))
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static inline void mmu_ll_set_page_size(uint32_t mmu_id, mmu_page_size_t size)
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{
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HAL_ASSERT(size == MMU_PAGE_64KB);
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}
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/**
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* Check if the external memory vaddr region is valid
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*
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* @param mmu_id MMU ID
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* @param vaddr_start start of the virtual address
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* @param len length, in bytes
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*
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* @return
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* True for valid
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*/
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__attribute__((always_inline))
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static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len)
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{
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(void)mmu_id;
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uint32_t vaddr_end = vaddr_start + len;
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return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) ||
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(ADDRESS_IN_IRAM1_CACHE(vaddr_start) && ADDRESS_IN_IRAM1_CACHE(vaddr_end)) ||
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(ADDRESS_IN_IROM0_CACHE(vaddr_start) && ADDRESS_IN_IROM0_CACHE(vaddr_end)) ||
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(ADDRESS_IN_DRAM1_CACHE(vaddr_start) && ADDRESS_IN_DRAM1_CACHE(vaddr_end)) ||
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(ADDRESS_IN_DROM0_CACHE(vaddr_start) && ADDRESS_IN_DROM0_CACHE(vaddr_end));
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}
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/**
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* Set MMU table entry as invalid
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*
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* @param mmu_id MMU ID
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* @param entry_id MMU entry ID
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*/
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__attribute__((always_inline))
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static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
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{
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HAL_ASSERT(entry_id < MMU_ENTRY_NUM);
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DPORT_INTERRUPT_DISABLE();
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switch (mmu_id) {
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case 0:
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DPORT_WRITE_PERI_REG((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[entry_id], DPORT_FLASH_MMU_TABLE_INVALID_VAL);
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break;
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case 1:
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DPORT_WRITE_PERI_REG((uint32_t)&DPORT_APP_FLASH_MMU_TABLE[entry_id], DPORT_FLASH_MMU_TABLE_INVALID_VAL);
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break;
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default:
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HAL_ASSERT(false && "invalid mmu_id");
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}
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DPORT_INTERRUPT_RESTORE();
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}
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/**
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* Unmap all the items in the MMU table
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*
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* @param mmu_id MMU ID
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*/
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__attribute__((always_inline))
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static inline void mmu_ll_unmap_all(uint32_t mmu_id)
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{
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for (int i = 0; i < MMU_ENTRY_NUM; i++) {
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mmu_ll_set_entry_invalid(mmu_id, i);
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}
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}
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#ifdef __cplusplus
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}
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#endif
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