Angus Gratton 367ecc2d60 Merge branch 'refactor/timerg_in_test' into 'master' ...

timer_group: refactoring to avoid direct register access in the ISR

See merge request espressif/esp-idf!5656

2019-08-14 15:32:16 +08:00

..

include/freertos

freertos: Rename CORE_ID_PRO/CORE_ID_APP macros to CORE_ID_REGVAL_xxx

2019-08-12 11:12:34 +10:00

test

timer_group: use the LL

2019-08-09 13:46:31 +08:00

CMakeLists.txt

cmake: some formatting fixes

2019-06-21 19:53:29 +08:00

component.mk

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croutine.c

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event_groups.c

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FreeRTOS-openocd.c

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Kconfig

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license.txt

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linker.lf

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list.c

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port.c

tools: Mass fixing of empty prototypes (for -Wstrict-prototypes)

2019-08-01 16:28:56 +07:00

portasm.S

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portmacro_priv.h

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portmux_impl.h

freertos: Rename CORE_ID_PRO/CORE_ID_APP macros to CORE_ID_REGVAL_xxx

2019-08-12 11:12:34 +10:00

portmux_impl.inc.h

freertos: Rename CORE_ID_PRO/CORE_ID_APP macros to CORE_ID_REGVAL_xxx

2019-08-12 11:12:34 +10:00

queue.c

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readme_xtensa.txt

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sdkconfig.rename

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stdint.readme

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tasks.c

Fix remaining -Wstrict-prototypes warnings

2019-08-01 16:28:56 +07:00

timers.c

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xtensa_context.S

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xtensa_init.c

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xtensa_intr_asm.S

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xtensa_intr.c

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xtensa_overlay_os_hook.c

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xtensa_vector_defaults.S

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xtensa_vectors.S

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