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c74ce1c201
- hal: add DWC OTG core LL (usb_dwc_ll.h) and USB wrap LL (usb_wrap_ll.h) - soc: add DWC register map/cfg (usb_dwc_struct.h, usb_dwc_cfg.h) and caps - soc/kconfig: enable SOC_USB_OTG_SUPPORTED=1, SOC_USB_OTG_PERIPH_NUM=1 - docs: add ESP32-H4 to usb_phy test app “Supported Targets” - ld: export USB_WRAP symbol - doxygen: include USB Host headers for H4 to emit .inc files
USB-OTG Examples
See the README.md file in the upper level examples directory for more information about examples.
Common Pin Assignments
Pin assignment is only needed for ESP chips that have a USB-OTG peripheral. If your board doesn't have a USB connector connected to the USB-OTG dedicated GPIOs, you may have to DIY a cable and connect D+ and D- to the pins listed below.
ESP BOARD USB CONNECTOR (type A)
--
| || VBUS (5V)
[USB_DM] ------> | || D-
[USB_DP] ------> | || D+
| || GND
--
USB PHY pin mapping
| USB_DP | USB_DM | |
|---|---|---|
| ESP32-S2/S3 | GPIO20 | GPIO19 |
| ESP32-P4 2.0 | pin 50 | pin 49 |
| ESP32-P4 1.1 | GPIO27 | GPIO26 |
Note: On the ESP32-P4, the USB 2.0 PHY pins are dedicated to USB-OTG functionality and cannot be used as general-purpose GPIOs.