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			70 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			ReStructuredText
		
	
	
	
	
	
			
		
		
	
	
			70 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			ReStructuredText
		
	
	
	
	
	
High-Level Interrupts
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=====================
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.. toctree::
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   :maxdepth: 1
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The Xtensa architecture has support for 32 interrupts, divided over 8 levels, plus an assortment of exceptions. On the {IDF_TARGET_NAME}, the interrupt mux allows most interrupt sources to be routed to these interrupts using the :doc:`interrupt allocator <../api-reference/system/intr_alloc>`. Normally, interrupts will be written in C, but ESP-IDF allows high-level interrupts to be written in assembly as well, allowing for very low interrupt latencies.
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Interrupt Levels
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----------------
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===== ================= ====================================================
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Level Symbol            Remark
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===== ================= ====================================================
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1     N/A               Exception and level 0 interrupts. Handled by ESP-IDF
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2-3   N/A               Medium level interrupts. Handled by ESP-IDF
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4     xt_highint4       Normally used by ESP-IDF debug logic
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5     xt_highint5       Free to use
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NMI   xt_nmi            Free to use
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dbg   xt_debugexception Debug exception. Called on e.g. a BREAK instruction.
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===== ================= ====================================================
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Using these symbols is done by creating an assembly file (suffix .S) and defining the named symbols, like this::
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        .section .iram1,"ax"
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        .global     xt_highint5
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        .type       xt_highint5,@function
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        .align      4
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    xt_highint5:
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        ... your code here
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        rsr     a0, EXCSAVE_5
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        rfi     5
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For a real-life example, see the :component_file:`esp_system/port/soc/{IDF_TARGET_PATH_NAME}/dport_panic_highint_hdl.S` file; the panic handler interrupt is implemented there.
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Notes
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-----
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 - Do not call C code from a high-level interrupt; because these interrupts still run in critical sections, this can cause crashes.
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   (The panic handler interrupt does call normal C code, but this is OK because there is no intention of returning to the normal code
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   flow afterwards.)
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 - Make sure your assembly code gets linked in. If the interrupt handler symbol is the only symbol the rest of the code uses from this
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   file, the linker will take the default ISR instead and not link the assembly file into the final project. To get around this, in the
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   assembly file, define a symbol, like this::
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            .global ld_include_my_isr_file
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       ld_include_my_isr_file:
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The symbol is called ``ld_include_my_isr_file`` here but can have any arbitrary name not defined anywhere else.
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Then, in the component CMakeLists.txt, add this file as an unresolved symbol to the ld command line arguments::
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   target_link_libraries(${COMPONENT_TARGET} "-u ld_include_my_isr_file")
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If using the legacy Make build system, add the following to component.mk, instead::
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   COMPONENT_ADD_LDFLAGS := -u ld_include_my_isr_file
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This should cause the linker to always include a file defining ``ld_include_my_isr_file``, causing the ISR to always be linked in.
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 - High-level interrupts can be routed and handled using esp_intr_alloc and associated functions. The handler and handler arguments
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   to esp_intr_alloc must be NULL, however.
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 - In theory, medium priority interrupts could also be handled in this way. For now, ESP-IDF does not support this.
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