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459ff8348f
This commit added the RISC-V utility functions to set the interrupt threshold for CLIC targets by using direct register value writes. This makes the functions more efficient during run-time. This is done to improve the critical section enter and exit performance on esp32p4.
17 lines
879 B
C
17 lines
879 B
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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//TODO: IDF-8313 update after chips back and PLL setup
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#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 10*1000*1000
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 1000
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 1000
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 1000
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 1000
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/* Spinlock performance on esp32p4 is slower. May need to adjust these values once IDF-7898 is fixed */
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#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP 380
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#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_UNICORE 135
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