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https://github.com/espressif/esp-idf.git
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420aef1ffe
* Target components pull in xtensa component directly * Use CPU HAL where applicable * Remove unnecessary xtensa headers * Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no longer signed/unsigned int). Changes come from internal branch commit a6723fc
135 lines
3.4 KiB
C
135 lines
3.4 KiB
C
#include "unity.h"
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#include <stdatomic.h>
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#include "esp_log.h"
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#include "esp_attr.h"
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#include "hal/cpu_hal.h"
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#include "../cache_utils.h"
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#define RECORD_TIME_PREPARE() uint32_t __t1, __t2
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#define RECORD_TIME_START() do {__t1 = cpu_hal_get_cycle_count();}while(0)
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#define RECORD_TIME_END(p_time) do{__t2 = cpu_hal_get_cycle_count(); *p_time = (__t2-__t1);}while(0)
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#define TEST_TIMES 11
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//Test twice, and only get the result of second time, to avoid influence of cache miss
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#define TEST_WRAP_START() \
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RECORD_TIME_PREPARE(); \
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spi_flash_disable_interrupts_caches_and_other_cpu(); \
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for (int i = 0; i < 2; i++) { \
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RECORD_TIME_START();
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#define TEST_WRAP_END(output) \
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RECORD_TIME_END(output); \
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} \
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spi_flash_enable_interrupts_caches_and_other_cpu();
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typedef void (*test_f)(uint32_t* t_op);
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static const char TAG[] = "test_atomic";
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static uint32_t s_t_ref;
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static void sorted_array_insert(uint32_t* array, int* size, uint32_t item)
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{
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int pos;
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for (pos = *size; pos>0; pos--) {
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if (array[pos-1] < item) break;
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array[pos] = array[pos-1];
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}
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array[pos]=item;
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(*size)++;
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}
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static void test_flow(const char* name, test_f func)
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{
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int t_flight_num = 0;
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uint32_t t_flight_sorted[TEST_TIMES];
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for (int i = 0; i < TEST_TIMES; i++) {
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uint32_t t_op;
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func(&t_op);
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sorted_array_insert(t_flight_sorted, &t_flight_num, t_op);
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}
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for (int i = 0; i < TEST_TIMES; i++) {
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ESP_LOGI(TAG, "%s: %d ops", name, t_flight_sorted[i]-s_t_ref);
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}
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}
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static IRAM_ATTR void test_ref(uint32_t* t_op)
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{
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TEST_WRAP_START()
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TEST_WRAP_END(t_op)
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s_t_ref = *t_op;
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}
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static IRAM_ATTR void test_atomic_load(uint32_t* t_op)
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{
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atomic_uint_fast32_t var;
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uint32_t target = rand();
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TEST_WRAP_START()
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target = atomic_load(&var);
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TEST_WRAP_END(t_op)
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(void) target;
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}
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static IRAM_ATTR void test_atomic_store(uint32_t* t_op)
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{
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atomic_uint_fast32_t var;
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uint32_t src = rand();
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TEST_WRAP_START()
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atomic_store(&var, src);
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TEST_WRAP_END(t_op)
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}
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static IRAM_ATTR void test_atomic_store_load(uint32_t* t_op)
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{
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atomic_uint_fast32_t var;
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uint32_t src = rand();
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TEST_WRAP_START()
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atomic_store(&var, src);
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src = atomic_load(&var);
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TEST_WRAP_END(t_op)
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}
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static IRAM_ATTR void test_atomic_fetch_and(uint32_t* t_op)
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{
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atomic_uint_fast32_t var;
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uint32_t src = rand();
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TEST_WRAP_START()
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src = atomic_fetch_and(&var, src);
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TEST_WRAP_END(t_op)
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}
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static IRAM_ATTR void test_atomic_fetch_or(uint32_t* t_op)
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{
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atomic_uint_fast32_t var;
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uint32_t src = rand();
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TEST_WRAP_START()
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src = atomic_fetch_or(&var, src);
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TEST_WRAP_END(t_op)
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}
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static IRAM_ATTR void test_atomic_compare_exchange(uint32_t* t_op)
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{
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atomic_uint_fast32_t var;
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uint32_t src = rand();
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uint32_t cmp = rand();
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bool res;
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TEST_WRAP_START()
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res = atomic_compare_exchange_weak(&var, &src, cmp);
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TEST_WRAP_END(t_op)
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(void) res;
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}
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TEST_CASE("test atomic","[atomic]")
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{
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test_flow("ref", test_ref);
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test_flow("atomic_load", test_atomic_load);
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test_flow("atomic_store", test_atomic_store);
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test_flow("atomic_compare_exchange", test_atomic_compare_exchange);
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test_flow("atomic_store + atomic_load", test_atomic_store_load);
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test_flow("atomic_and", test_atomic_fetch_and);
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test_flow("atomic_or", test_atomic_fetch_or);
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}
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