Files
esp-idf/components/esp_hal_timg/esp32/include/hal/timg_ll.h
morris e8de5b5a95 refactor(gptimer): clean up SOC capabilities for GPTIMER and Timer Group
- Remove GPTIMER and TIMG related definitions from soc_caps_full.h files
- Move timer peripheral definitions to appropriate HAL layer files
- Update references across components to use proper HAL abstractions
- Consolidate timer group and GPTIMER capabilities organization
- Ensure consistent timer configuration across all ESP32 variants

This refactoring improves the separation of concerns between SOC
capabilities and HAL implementations for timer-related functionality.
2025-10-14 11:44:38 +08:00

87 lines
2.6 KiB
C

/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// Attention: Timer Group has 3 independent functions: General Purpose Timer, Watchdog Timer and Clock calibration.
#pragma once
#include <stdbool.h>
#include "hal/assert.h"
#include "hal/misc.h"
#include "soc/timer_group_struct.h"
#include "soc/dport_reg.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 2
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Enable the bus clock for timer group module
*
* @param group_id Group ID
* @param enable true to enable, false to disable
*/
static inline void _timg_ll_enable_bus_clock(int group_id, bool enable)
{
uint32_t reg_val = DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG);
if (group_id == 0) {
reg_val &= ~DPORT_TIMERGROUP_CLK_EN;
reg_val |= enable << 13;
} else {
reg_val &= ~DPORT_TIMERGROUP1_CLK_EN;
reg_val |= enable << 15;
}
DPORT_WRITE_PERI_REG(DPORT_PERIP_CLK_EN_REG, reg_val);
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
#define timg_ll_enable_bus_clock(...) do { \
(void)__DECLARE_RCC_RC_ATOMIC_ENV; \
_timg_ll_enable_bus_clock(__VA_ARGS__); \
} while(0)
/**
* @brief Reset the timer group module
*
* @note After reset the register, the "flash boot protection" will be enabled again.
* FLash boot protection is not used anymore after system boot up.
* This function will disable it by default in order to prevent the system from being reset unexpectedly.
*
* @param group_id Group ID
*/
static inline void _timg_ll_reset_register(int group_id)
{
if (group_id == 0) {
DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP_RST);
DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, 0);
TIMERG0.wdtconfig0.wdt_flashboot_mod_en = 0;
} else {
DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP1_RST);
DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, 0);
TIMERG1.wdtconfig0.wdt_flashboot_mod_en = 0;
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
#define timg_ll_reset_register(...) do { \
(void)__DECLARE_RCC_RC_ATOMIC_ENV; \
_timg_ll_reset_register(__VA_ARGS__); \
} while(0)
#ifdef __cplusplus
}
#endif