mirror of
https://github.com/espressif/esp-idf.git
synced 2025-11-03 14:01:53 +00:00
e8de5b5a95
- Remove GPTIMER and TIMG related definitions from soc_caps_full.h files - Move timer peripheral definitions to appropriate HAL layer files - Update references across components to use proper HAL abstractions - Consolidate timer group and GPTIMER capabilities organization - Ensure consistent timer configuration across all ESP32 variants This refactoring improves the separation of concerns between SOC capabilities and HAL implementations for timer-related functionality.
232 lines
8.1 KiB
CMake
232 lines
8.1 KiB
CMake
idf_build_get_property(target IDF_TARGET)
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idf_build_get_property(non_os_build NON_OS_BUILD)
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# On Linux, we only support a few features, hence this simple component registration
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if(${target} STREQUAL "linux")
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idf_component_register(SRCS "port/linux/esp_random.c"
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"port/linux/chip_info.c"
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INCLUDE_DIRS "include" "etm/include")
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return()
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endif()
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set(requires soc)
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# only esp_hw_support/adc_share_hw_ctrl.c requires efuse component
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set(priv_requires efuse spi_flash bootloader_support esp_hal_wdt)
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if(${target} STREQUAL "esp32c6")
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list(APPEND priv_requires hal)
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endif()
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set(srcs "cpu.c" "port/${IDF_TARGET}/esp_cpu_intr.c" "esp_memory_utils.c" "port/${IDF_TARGET}/cpu_region_protect.c")
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if(NOT non_os_build)
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list(APPEND srcs "esp_clk.c"
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"clk_ctrl_os.c"
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"hw_random.c"
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"intr_alloc.c"
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"mac_addr.c"
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"periph_ctrl.c"
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"revision.c"
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"rtc_module.c"
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"regi2c_ctrl.c"
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"esp_gpio_reserve.c"
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"sar_tsens_ctrl.c"
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"port/${target}/io_mux.c"
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"port/${target}/esp_clk_tree.c"
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"dma/esp_dma_utils.c"
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"dma/gdma_link.c"
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"spi_bus_lock.c"
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"clk_utils.c")
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if(CONFIG_SOC_USB_OTG_SUPPORTED)
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list(APPEND srcs "usb_phy/usb_phy.c")
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endif()
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if(CONFIG_SOC_CLK_TREE_SUPPORTED)
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list(APPEND srcs "port/esp_clk_tree_common.c")
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endif()
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if(CONFIG_SOC_GPSPI_SUPPORTED)
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list(APPEND srcs "spi_share_hw_ctrl.c")
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endif()
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if(CONFIG_SOC_ADC_SUPPORTED)
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list(APPEND srcs "adc_share_hw_ctrl.c")
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endif()
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if(CONFIG_SOC_ISP_SHARE_CSI_BRG)
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list(APPEND srcs "mipi_csi_share_hw_ctrl.c")
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endif()
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if(CONFIG_SOC_PAU_SUPPORTED)
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list(APPEND srcs "sleep_retention.c")
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endif()
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if(CONFIG_SOC_MODEM_SUPPORT_ETM)
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list(APPEND srcs "modem/modem_etm.c")
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endif()
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if(CONFIG_SOC_PMU_SUPPORTED)
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list(APPEND srcs "pmu_share_hw.c")
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endif()
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if(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED)
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list(APPEND srcs "sleep_modem.c"
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"sleep_modes.c"
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"sleep_console.c"
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"sleep_usb.c"
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"sleep_gpio.c"
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"sleep_event.c"
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)
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if(CONFIG_SOC_PAU_SUPPORTED AND CONFIG_SOC_PM_SUPPORT_TOP_PD)
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list(APPEND srcs "sleep_system_peripheral.c")
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endif()
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endif()
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# [refactor-todo]
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list(APPEND priv_requires esp_driver_gpio # for GPIO and RTC (by sleep_gpio and sleep_modes)
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esp_timer
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esp_pm)
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list(APPEND priv_requires esp_mm esp_hal_mspi)
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if(CONFIG_IDF_TARGET_ESP32 OR CONFIG_IDF_TARGET_ESP32S2)
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list(APPEND srcs "rtc_wdt.c")
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endif()
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if(CONFIG_SOC_GDMA_SUPPORTED)
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list(APPEND srcs "dma/gdma.c")
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if(CONFIG_SOC_GDMA_SUPPORT_SLEEP_RETENTION AND CONFIG_SOC_PAU_SUPPORTED)
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list(APPEND srcs "dma/gdma_sleep_retention.c")
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endif()
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if(CONFIG_SOC_GDMA_SUPPORT_ETM)
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list(APPEND srcs "dma/gdma_etm.c")
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endif()
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if(CONFIG_SOC_GDMA_SUPPORT_CRC)
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list(APPEND srcs "dma/gdma_crc.c")
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endif()
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endif()
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if(CONFIG_SOC_GP_LDO_SUPPORTED)
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list(APPEND srcs "ldo/esp_ldo_regulator.c")
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endif()
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if(CONFIG_SOC_DEBUG_PROBE_SUPPORTED)
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list(APPEND srcs "debug_probe/debug_probe.c")
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endif()
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if(CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED)
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list(APPEND srcs "dma/esp_async_memcpy.c")
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if(CONFIG_SOC_GDMA_SUPPORTED)
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list(APPEND srcs "dma/async_memcpy_gdma.c")
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endif() # CONFIG_SOC_GDMA_SUPPORTED
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if(CONFIG_SOC_CP_DMA_SUPPORTED)
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list(APPEND srcs "dma/async_memcpy_cp_dma.c")
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endif() # CONFIG_SOC_CP_DMA_SUPPORTED
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endif() # CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED
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if(CONFIG_SOC_DW_GDMA_SUPPORTED)
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list(APPEND srcs "dma/dw_gdma.c")
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endif()
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if(CONFIG_SOC_DMA2D_SUPPORTED)
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list(APPEND srcs "dma/dma2d.c")
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endif()
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if(CONFIG_SOC_SYSTIMER_SUPPORTED)
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list(APPEND srcs "port/${target}/systimer.c")
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endif()
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if(CONFIG_SOC_ETM_SUPPORTED)
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list(APPEND srcs "etm/esp_etm.c")
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endif()
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if(CONFIG_SOC_PAU_SUPPORTED)
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list(APPEND srcs "port/pau_regdma.c"
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"port/regdma_link.c")
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endif()
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if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
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list(APPEND srcs "modem_clock.c")
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endif()
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if(NOT CONFIG_APP_BUILD_TYPE_PURE_RAM_APP)
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list(APPEND srcs "mspi_timing_tuning/mspi_timing_tuning.c")
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if(CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY AND NOT CONFIG_IDF_TARGET_ESP32S3)
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if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/mspi_timing_tuning/tuning_scheme_impl/mspi_timing_by_mspi_delay.c")
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list(APPEND srcs "mspi_timing_tuning/tuning_scheme_impl/mspi_timing_by_mspi_delay.c")
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endif()
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endif()
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if(CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_DQS)
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list(APPEND srcs "mspi_timing_tuning/tuning_scheme_impl/mspi_timing_by_dqs.c")
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endif()
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if(CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_FLASH_DELAY)
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list(APPEND srcs "mspi_timing_tuning/tuning_scheme_impl/mspi_timing_by_flash_delay.c")
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endif()
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endif()
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if(CONFIG_SOC_RTC_FAST_MEM_SUPPORTED AND CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB)
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list(APPEND srcs "sleep_wake_stub.c")
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endif()
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if(CONFIG_SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX OR CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX)
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list(APPEND srcs "esp_clock_output.c")
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endif()
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if(CONFIG_SOC_BOD_SUPPORTED)
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list(APPEND srcs "power_supply/brownout.c")
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endif()
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if(CONFIG_SOC_VBAT_SUPPORTED)
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list(APPEND srcs "power_supply/vbat.c")
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endif()
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else()
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if(ESP_TEE_BUILD)
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list(APPEND srcs "esp_clk.c" "hw_random.c")
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endif()
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# Requires "_esp_error_check_failed()" function
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list(APPEND priv_requires "esp_system")
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endif()
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set(public_include_dirs "include" "include/soc"
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"dma/include" "ldo/include" "debug_probe/include" "etm/include"
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"mspi_timing_tuning/include" "mspi_timing_tuning/tuning_scheme_impl/include"
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"power_supply/include" "modem/include")
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if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/include/soc/${target}")
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list(APPEND public_include_dirs
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"include/soc/${target}"
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)
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endif()
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if(CONFIG_ESP32P4_SELECTS_REV_LESS_V3)
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if(CMAKE_C_COMPILER_ID MATCHES "GNU")
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# 1. Set xespv2p1 explicitly to override the default xespv2p2.
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# 2. Remove zc* extensions:
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# The ESP32-P4 has always supported the zc* extensions,
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# but revisions earlier than v3.0 are affected by hardware issue DIG-661
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# and lack the mintthresh_csr register needed for the workaround.
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idf_build_set_property(COMPILE_OPTIONS "-march=rv32imafc_zicsr_zifencei_zaamo_zalrsc_xesploop_xespv2p1" APPEND)
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endif()
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elseif(CONFIG_IDF_TARGET_ESP32P4)
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if(CMAKE_C_COMPILER_ID MATCHES "Clang") # TODO: LLVM-478
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message(FATAL_ERROR "ESP32-P4 rev. 3.0 or higher is not supported in Clang-based toolchain")
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endif()
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endif()
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idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS ${public_include_dirs}
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PRIV_INCLUDE_DIRS port/include include/esp_private
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REQUIRES ${requires}
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PRIV_REQUIRES "${priv_requires}"
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LDFRAGMENTS linker.lf dma/linker.lf ldo/linker.lf mspi_timing_tuning/linker.lf)
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idf_build_get_property(target IDF_TARGET)
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add_subdirectory(port/${target})
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if(CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING)
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add_subdirectory(mspi_timing_tuning/port/${target})
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endif()
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add_subdirectory(lowpower)
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if(CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND OR CONFIG_PM_SLP_DISABLE_GPIO)
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target_link_libraries(${COMPONENT_LIB} INTERFACE "-u esp_sleep_gpio_include")
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endif()
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if(NOT non_os_build)
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if(CONFIG_SPIRAM)
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idf_component_optional_requires(PRIVATE esp_psram)
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endif()
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endif()
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