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ec68cb33004cac224a4c39aeab938bbe877d7765
esp-idf/components/esp_rom/esp32c2
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Alexey Lapshin ec68cb3300 feat(newlib): riscv: add CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS config option 
This option replaces implementations of functions from ROM:
  - memcpy
  - memcmp
  - memmove
  - str[n]cpy
  - str[n]cmp

The functions used in the firmware will be better optimized for misaligned
memory. Here are some measurements in CPU cycles for 4096-byte buffers:

  memcpy:  28676 -> 4128
  memcmp:  49147 -> 14259
  memmove: 33896 -> 8086
  strcpy:  32771 -> 17313
  strcmp:  32775 -> 13191
2025-03-26 17:27:24 +07:00
..
include/esp32c2/rom
change(esp_rom): optimize target-specific header files layout in components/esp_rom
2024-06-27 11:24:45 +08:00
ld
feat(newlib): riscv: add CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS config option
2025-03-26 17:27:24 +07:00
esp_rom_caps.h
feat(newlib): riscv: add CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS config option
2025-03-26 17:27:24 +07:00
Kconfig.soc_caps.in
feat(newlib): riscv: add CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS config option
2025-03-26 17:27:24 +07:00