Files
esp-idf/components/esp_rom/esp32c6/Kconfig.soc_caps.in
Alexey Lapshin ec68cb3300 feat(newlib): riscv: add CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS config option
This option replaces implementations of functions from ROM:
  - memcpy
  - memcmp
  - memmove
  - str[n]cpy
  - str[n]cmp

The functions used in the firmware will be better optimized for misaligned
memory. Here are some measurements in CPU cycles for 4096-byte buffers:

  memcpy:  28676 -> 4128
  memcmp:  49147 -> 14259
  memmove: 33896 -> 8086
  strcpy:  32771 -> 17313
  strcmp:  32775 -> 13191
2025-03-26 17:27:24 +07:00

121 lines
1.8 KiB
Plaintext

#####################################################
# This file is auto-generated from SoC caps
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################
config ESP_ROM_HAS_CRC_LE
bool
default y
config ESP_ROM_HAS_CRC_BE
bool
default y
config ESP_ROM_HAS_JPEG_DECODE
bool
default y
config ESP_ROM_UART_CLK_IS_XTAL
bool
default y
config ESP_ROM_USB_SERIAL_DEVICE_NUM
int
default 3
config ESP_ROM_HAS_RETARGETABLE_LOCKING
bool
default y
config ESP_ROM_GET_CLK_FREQ
bool
default y
config ESP_ROM_HAS_RVFPLIB
bool
default y
config ESP_ROM_HAS_HAL_WDT
bool
default y
config ESP_ROM_HAS_HAL_SYSTIMER
bool
default y
config ESP_ROM_HAS_HEAP_TLSF
bool
default y
config ESP_ROM_TLSF_CHECK_PATCH
bool
default y
config ESP_ROM_MULTI_HEAP_WALK_PATCH
bool
default y
config ESP_ROM_HAS_LAYOUT_TABLE
bool
default y
config ESP_ROM_HAS_SPI_FLASH
bool
default y
config ESP_ROM_HAS_REGI2C_BUG
bool
default y
config ESP_ROM_HAS_NEWLIB
bool
default y
config ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT
bool
default y
config ESP_ROM_REV0_HAS_NO_ECDSA_INTERFACE
bool
default y
config ESP_ROM_WDT_INIT_PATCH
bool
default y
config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
bool
default y
config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
bool
default y
config ESP_ROM_HAS_SW_FLOAT
bool
default y
config ESP_ROM_USB_OTG_NUM
int
default -1
config ESP_ROM_HAS_VERSION
bool
default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y
config ESP_ROM_HAS_OUTPUT_PUTC_FUNC
bool
default y
config ESP_ROM_NO_USB_SERIAL_OUTPUT_API
bool
default y
config ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY
bool
default y