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	 4374966d4e
			
		
	
	4374966d4e
	
	
	
		
			
			rtos_int_exit would store RA at an offset of 4 byte from the SP, where the offset should be 0. This caused rtos_int_exit to overwrite variables in bss.
		
			
				
	
	
		
			110 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			110 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| // Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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| //
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| // Licensed under the Apache License, Version 2.0 (the "License");
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| // you may not use this file except in compliance with the License.
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| // You may obtain a copy of the License at
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| 
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| //     http://www.apache.org/licenses/LICENSE-2.0
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| //
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| // Unless required by applicable law or agreed to in writing, software
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| // distributed under the License is distributed on an "AS IS" BASIS,
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| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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| // See the License for the specific language governing permissions and
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| // limitations under the License.
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| 
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|     .global uxInterruptNesting
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|     .global uxSchedulerRunning
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|     .global xIsrStackTop
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|     .global pxCurrentTCB
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|     .global vTaskSwitchContext
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|     .global xPortSwitchFlag
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| 
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|     .section .text
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| 
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| /**
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|  * This function makes the RTOS aware about a ISR entering, it takes the
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|  * current task stack saved, places into the TCB, loads the ISR stack
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|  * the interrupted stack must be passed in a0. It needs to receive the
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|  * ISR nesting code improvements
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|  */
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| 
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|     .global rtos_int_enter
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|     .type rtos_int_enter, @function
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| rtos_int_enter:
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|     /* preserve the return address */
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|     mv t1, ra
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|     mv t2, a0
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| 
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|     /* scheduler not enabled, jump directly to ISR handler */
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|     lw t0, uxSchedulerRunning
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|     beq t0,zero, rtos_enter_end
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| 
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|     /* increments the ISR nesting count */
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| 	la t3, uxInterruptNesting
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| 	lw t4, 0x0(t3)
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| 	addi t5,t4,1
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| 	sw  t5, 0x0(t3)
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| 
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|     /* If reached here from another low-prio ISR, skip stack pushing to TCB */
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| 	bne t4,zero, rtos_enter_end
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| 
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|     /* Save current TCB and load the ISR stack */
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|     lw  t0, pxCurrentTCB
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|     sw 	t2, 0x0(t0)
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|     lw  sp, xIsrStackTop
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| 
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| rtos_enter_end:
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|     mv  ra, t1
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|     ret
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| 
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| /**
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|  * Recovers the next task to run stack pointer and place it into
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|  * a0, then the interrupt handler can restore the context of
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|  * the next task
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|  */
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|     .global rtos_int_exit
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|     .type rtos_int_exit, @function
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| rtos_int_exit:
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|     /* may skip RTOS aware interrupt since scheduler was not started */
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|     lw t0, uxSchedulerRunning
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|     beq t0,zero, rtos_exit_end
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| 
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|     /* update nesting interrupts counter */
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|     la t2, uxInterruptNesting
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|     lw t3, 0x0(t2)
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| 
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|     /* Already zero, protect against underflow */
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|     beq t3, zero, isr_skip_decrement
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|     addi t3,t3, -1
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|     sw  t3, 0x0(t2)
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| 
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| isr_skip_decrement:
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| 
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|     /* may still have interrupts pending, skip section below and exit */
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|     bne t3,zero,rtos_exit_end
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| 
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|     /* Schedule the next task if a yield is pending */
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|     la t0, xPortSwitchFlag
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|     lw t2, 0x0(t0)
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|     beq t2, zero, no_switch
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| 
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|     /* preserve return address and schedule next task */
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|     addi sp,sp,-4
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|     sw  ra, 0(sp)
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|     call vTaskSwitchContext
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|     lw  ra, 0(sp)
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|     addi sp, sp, 4
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| 
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|     /* Clears the switch pending flag */
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|     la t0, xPortSwitchFlag
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|     mv t2, zero
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|     sw  t2, 0x0(t0)
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| 
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| no_switch:
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|     /* Recover the stack of next task and prepare to exit : */
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|     lw a0, pxCurrentTCB
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|     lw a0, 0x0(a0)
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| 
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| rtos_exit_end:
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|     ret
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