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93 lines
3.0 KiB
C
93 lines
3.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The HAL layer for GPIO (common part)
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#include "soc/soc.h"
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#include "esp_attr.h"
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#include "soc/gpio_periph.h"
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#include "hal/gpio_hal.h"
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#include "esp_rom_gpio.h"
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#include "hal/config.h"
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void gpio_hal_intr_enable_on_core(gpio_hal_context_t *hal, uint32_t gpio_num, uint32_t core_id)
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{
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if (gpio_num < 32) {
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gpio_ll_clear_intr_status(hal->dev, BIT(gpio_num));
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} else {
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gpio_ll_clear_intr_status_high(hal->dev, BIT(gpio_num - 32));
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}
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gpio_ll_intr_enable_on_core(hal->dev, core_id, gpio_num);
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}
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void gpio_hal_intr_disable(gpio_hal_context_t *hal, uint32_t gpio_num)
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{
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gpio_ll_intr_disable(hal->dev, gpio_num);
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if (gpio_num < 32) {
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gpio_ll_clear_intr_status(hal->dev, BIT(gpio_num));
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} else {
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gpio_ll_clear_intr_status_high(hal->dev, BIT(gpio_num - 32));
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}
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}
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void gpio_hal_iomux_in(gpio_hal_context_t *hal, uint32_t gpio_num, int func, uint32_t signal_idx)
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{
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gpio_ll_set_input_signal_from(hal->dev, signal_idx, false);
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gpio_ll_input_enable(hal->dev, gpio_num);
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gpio_ll_func_sel(hal->dev, gpio_num, func);
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}
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void gpio_hal_iomux_out(gpio_hal_context_t *hal, uint32_t gpio_num, int func)
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{
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gpio_ll_set_output_enable_ctrl(hal->dev, gpio_num, true, false);
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gpio_ll_func_sel(hal->dev, gpio_num, func);
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}
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void gpio_hal_matrix_in(gpio_hal_context_t *hal, uint32_t gpio_num, uint32_t signal_idx, bool in_inv)
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{
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gpio_ll_input_enable(hal->dev, gpio_num);
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#if HAL_CONFIG_GPIO_USE_ROM_API
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esp_rom_gpio_connect_in_signal(gpio_num, signal_idx, in_inv);
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#else
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gpio_ll_set_input_signal_matrix_source(hal->dev, signal_idx, gpio_num, in_inv);
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#endif
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}
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void gpio_hal_matrix_out(gpio_hal_context_t *hal, uint32_t gpio_num, uint32_t signal_idx, bool out_inv, bool oen_inv)
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{
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gpio_ll_func_sel(hal->dev, gpio_num, PIN_FUNC_GPIO);
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#if HAL_CONFIG_GPIO_USE_ROM_API
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esp_rom_gpio_connect_out_signal(gpio_num, signal_idx, out_inv, oen_inv);
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#else
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gpio_ll_set_output_signal_matrix_source(hal->dev, gpio_num, signal_idx, out_inv);
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gpio_ll_set_output_enable_ctrl(hal->dev, gpio_num, true, oen_inv); // output is enabled at the end to avoid undesired level change
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#endif
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}
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#if SOC_GPIO_SUPPORT_PIN_HYS_FILTER
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void gpio_hal_hysteresis_soft_enable(gpio_hal_context_t *hal, uint32_t gpio_num, bool enable)
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{
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#if SOC_GPIO_SUPPORT_PIN_HYS_CTRL_BY_EFUSE
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gpio_ll_pin_input_hysteresis_ctrl_sel_soft(hal->dev, gpio_num);
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#endif
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if (enable) {
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gpio_ll_pin_input_hysteresis_enable(hal->dev, gpio_num);
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} else {
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gpio_ll_pin_input_hysteresis_disable(hal->dev, gpio_num);
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}
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}
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#endif //SOC_GPIO_SUPPORT_PIN_HYS_FILTER
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void gpio_hal_isolate_in_sleep(gpio_hal_context_t *hal, uint32_t gpio_num)
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{
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gpio_ll_sleep_input_disable(hal->dev, gpio_num);
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gpio_ll_sleep_output_disable(hal->dev, gpio_num);
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gpio_ll_sleep_pullup_dis(hal->dev, gpio_num);
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gpio_ll_sleep_pulldown_dis(hal->dev, gpio_num);
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gpio_ll_sleep_sel_en(hal->dev, gpio_num);
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}
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