mirror of
https://github.com/espressif/esp-idf.git
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fe3da7167e
fix(esp_hw_support): optimize retention cost and update sleep time compensation See merge request espressif/esp-idf!37920
239 lines
9.1 KiB
C
239 lines
9.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <string.h>
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#include <sys/lock.h>
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#include <sys/param.h>
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#include "esp_attr.h"
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#include "esp_sleep.h"
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#include "esp_log.h"
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#include "esp_memory_utils.h"
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#include "soc/soc_caps.h"
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#include "soc/uart_pins.h"
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#include "sdkconfig.h"
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#include "driver/gpio.h"
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#include "hal/gpio_hal.h"
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#include "hal/rtc_io_hal.h"
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#include "soc/rtc_io_periph.h"
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#include "soc/uart_channel.h"
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#include "hal/rtc_hal.h"
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#include "esp_private/gpio.h"
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#include "esp_private/sleep_gpio.h"
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#include "esp_private/spi_flash_os.h"
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#include "esp_private/startup_internal.h"
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#include "bootloader_flash.h"
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static const char *TAG = "sleep_gpio";
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#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
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void gpio_sleep_mode_config_apply(void)
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{
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for (gpio_num_t gpio_num = GPIO_NUM_0; gpio_num < GPIO_NUM_MAX; gpio_num++) {
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if (GPIO_IS_VALID_GPIO(gpio_num)) {
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gpio_sleep_pupd_config_apply(gpio_num);
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}
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}
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}
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IRAM_ATTR void gpio_sleep_mode_config_unapply(void)
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{
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for (gpio_num_t gpio_num = GPIO_NUM_0; gpio_num < GPIO_NUM_MAX; gpio_num++) {
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if (GPIO_IS_VALID_GPIO(gpio_num)) {
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gpio_sleep_pupd_config_unapply(gpio_num);
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}
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}
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}
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#endif
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void esp_sleep_config_gpio_isolate(void)
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{
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ESP_EARLY_LOGI(TAG, "Configure to isolate all GPIO pins in sleep state");
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for (gpio_num_t gpio_num = GPIO_NUM_0; gpio_num < GPIO_NUM_MAX; gpio_num++) {
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if (GPIO_IS_VALID_GPIO(gpio_num)) {
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gpio_sleep_set_direction(gpio_num, GPIO_MODE_DISABLE);
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gpio_sleep_set_pull_mode(gpio_num, GPIO_FLOATING);
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}
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}
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#if CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU && !SOC_MSPI_HAS_INDEPENT_IOMUX
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_CLK), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_Q), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_HD), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_WP), GPIO_PULLUP_ONLY);
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#if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
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bool octal_mspi_required = bootloader_flash_is_octal_mode_enabled();
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#if CONFIG_SPIRAM_MODE_OCT
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octal_mspi_required |= true;
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#endif // CONFIG_SPIRAM_MODE_OCT
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if (octal_mspi_required) {
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_DQS), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D4), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D5), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D6), GPIO_PULLUP_ONLY);
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gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D7), GPIO_PULLUP_ONLY);
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}
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#endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
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#endif // CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU
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}
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void esp_sleep_enable_gpio_switch(bool enable)
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{
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ESP_EARLY_LOGI(TAG, "%s automatic switching of GPIO sleep configuration", enable ? "Enable" : "Disable");
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for (gpio_num_t gpio_num = GPIO_NUM_0; gpio_num < GPIO_NUM_MAX; gpio_num++) {
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if (GPIO_IS_VALID_GPIO(gpio_num)) {
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#if CONFIG_ESP_CONSOLE_UART
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#if CONFIG_ESP_CONSOLE_UART_CUSTOM
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const int uart_tx_gpio = (CONFIG_ESP_CONSOLE_UART_TX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_TX_GPIO : UART_NUM_0_TXD_DIRECT_GPIO_NUM;
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const int uart_rx_gpio = (CONFIG_ESP_CONSOLE_UART_RX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_RX_GPIO : UART_NUM_0_RXD_DIRECT_GPIO_NUM;
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if ((gpio_num == uart_tx_gpio) || (gpio_num == uart_rx_gpio)) {
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#else
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if ((gpio_num == UART_NUM_0_TXD_DIRECT_GPIO_NUM) || (gpio_num == UART_NUM_0_RXD_DIRECT_GPIO_NUM)) {
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#endif
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gpio_sleep_sel_dis(gpio_num);
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continue;
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}
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#endif
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/* If the PSRAM is disable in ESP32xx chips equipped with PSRAM, there will be a large current leakage. */
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#if CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM & !SOC_MSPI_HAS_INDEPENT_IOMUX
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if (gpio_num == esp_mspi_get_io(ESP_MSPI_IO_CS1)) {
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gpio_sleep_sel_dis(gpio_num);
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continue;
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}
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#endif // CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM
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#if CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND & !SOC_MSPI_HAS_INDEPENT_IOMUX
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if (gpio_num == esp_mspi_get_io(ESP_MSPI_IO_CS0)) {
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gpio_sleep_sel_dis(gpio_num);
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continue;
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}
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#endif // CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND
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if (enable) {
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gpio_sleep_sel_en(gpio_num);
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} else {
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gpio_sleep_sel_dis(gpio_num);
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}
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}
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}
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}
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#if SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP && !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
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IRAM_ATTR void esp_sleep_isolate_digital_gpio(void)
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{
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gpio_hal_context_t gpio_hal = {
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.dev = GPIO_HAL_GET_HW(GPIO_PORT_0)
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};
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/* no need to do isolate if digital IOs are not being held in deep sleep */
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if (!gpio_hal_deep_sleep_hold_is_en(&gpio_hal)) {
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return;
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}
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/**
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* there is a situation where we cannot isolate digital IO before deep sleep:
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* - task stack is located in external ram(mspi ram), since we will isolate mspi io
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*
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* assert here instead of returning directly, because if digital IO is not isolated,
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* the bottom current of deep sleep will be higher than light sleep, and there is no
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* reason to use deep sleep at this time.
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*/
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assert(esp_ptr_internal(&gpio_hal) && "If hold digital IO, the stack of the task calling esp_deep_sleep_start must be in internal ram!");
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/* isolate digital IO that is not held(keep the configuration of digital IOs held by users) */
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for (gpio_num_t gpio_num = GPIO_NUM_0; gpio_num < GPIO_NUM_MAX; gpio_num++) {
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if (GPIO_IS_VALID_DIGITAL_IO_PAD(gpio_num) && !gpio_hal_is_digital_io_hold(&gpio_hal, gpio_num)) {
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bool is_mspi_io_pad = false;
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esp_mspi_io_t mspi_ios[] = { ESP_MSPI_IO_CS0, ESP_MSPI_IO_CLK, ESP_MSPI_IO_Q, ESP_MSPI_IO_D, ESP_MSPI_IO_HD, ESP_MSPI_IO_WP };
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for (int i = 0; i < sizeof(mspi_ios) / sizeof(mspi_ios[0]); i++) {
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if (esp_mspi_get_io(mspi_ios[i]) == gpio_num) {
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is_mspi_io_pad = true;
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break;
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}
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}
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// Ignore MSPI and default Console UART io pads, When the CPU executes
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// the following instructions to configure the MSPI IO PAD, access on
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// the MSPI signal lines (as CPU instruction execution and MSPI access
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// operations are asynchronous) may cause the SoC to hang.
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if (is_mspi_io_pad || gpio_num == U0RXD_GPIO_NUM || gpio_num == U0TXD_GPIO_NUM) {
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continue;
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}
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/* disable I/O */
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gpio_hal_input_disable(&gpio_hal, gpio_num);
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gpio_hal_output_disable(&gpio_hal, gpio_num);
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/* disable pull up/down */
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gpio_hal_pullup_dis(&gpio_hal, gpio_num);
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gpio_hal_pulldown_dis(&gpio_hal, gpio_num);
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/* make pad work as gpio(otherwise, deep sleep bottom current will rise) */
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gpio_hal_func_sel(&gpio_hal, gpio_num, PIN_FUNC_GPIO);
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}
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}
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}
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#endif //SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP && !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
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#if SOC_DEEP_SLEEP_SUPPORTED
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void esp_deep_sleep_wakeup_io_reset(void)
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{
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#if SOC_PM_SUPPORT_EXT1_WAKEUP
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uint32_t rtc_io_mask = rtc_hal_ext1_get_wakeup_pins();
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// Disable ext1 wakeup before releasing hold, such that wakeup status can reflect the correct wakeup pin
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rtc_hal_ext1_clear_wakeup_pins();
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for (int gpio_num = 0; gpio_num < SOC_GPIO_PIN_COUNT && rtc_io_mask != 0; ++gpio_num) {
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int rtcio_num = rtc_io_num_map[gpio_num];
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if ((rtc_io_mask & BIT(rtcio_num)) == 0) {
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continue;
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}
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rtcio_hal_hold_disable(rtcio_num);
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rtc_io_mask &= ~BIT(rtcio_num);
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}
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#endif
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#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
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uint32_t dl_io_mask = SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK;
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gpio_hal_context_t gpio_hal = {
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.dev = GPIO_HAL_GET_HW(GPIO_PORT_0)
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};
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while (dl_io_mask) {
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int gpio_num = __builtin_ffs(dl_io_mask) - 1;
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bool wakeup_io_enabled = gpio_hal_deepsleep_wakeup_is_enabled(&gpio_hal, gpio_num);
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if (wakeup_io_enabled) {
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// Disable the wakeup before releasing hold, such that wakeup status can reflect the correct wakeup pin
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gpio_hal_deepsleep_wakeup_disable(&gpio_hal, gpio_num);
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gpio_hal_hold_dis(&gpio_hal, gpio_num);
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}
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dl_io_mask &= ~BIT(gpio_num);
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}
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#endif
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}
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#endif
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#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
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ESP_SYSTEM_INIT_FN(esp_sleep_startup_init, SECONDARY, BIT(0), 105)
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{
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// Configure to isolate (disable the Input/Output/Pullup/Pulldown
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// function of the pin) all GPIO pins in sleep state
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esp_sleep_config_gpio_isolate();
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// Enable automatic switching of GPIO configuration
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esp_sleep_enable_gpio_switch(true);
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return ESP_OK;
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}
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void esp_sleep_gpio_include(void)
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{
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// Linker hook function, exists to make the linker examine this file
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}
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#endif
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