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https://github.com/espressif/esp-idf.git
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134 lines
4.1 KiB
C
134 lines
4.1 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include "esp_gdbstub.h"
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#include "esp_gdbstub_common.h"
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#include "soc/cpu.h"
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#include "soc/soc_memory_layout.h"
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#include "xtensa/config/specreg.h"
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#include "sdkconfig.h"
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#if !XCHAL_HAVE_WINDOWED
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#warning "gdbstub_xtensa: revisit the implementation for Call0 ABI"
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#endif
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extern int _invalid_pc_placeholder;
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static void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
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{
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memset(dst, 0, sizeof(*dst));
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}
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static void update_regfile_common(esp_gdbstub_gdb_regfile_t *dst)
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{
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if (dst->a[0] & 0x8000000U) {
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dst->a[0] = (uint32_t)cpu_ll_pc_to_ptr(dst->a[0]);
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}
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if (!esp_stack_ptr_is_sane(dst->a[1])) {
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dst->a[1] = 0xDEADBEEF;
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}
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dst->windowbase = 0;
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dst->windowstart = 0x1;
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RSR(CONFIGID0, dst->configid0);
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RSR(CONFIGID1, dst->configid1);
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}
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void esp_gdbstub_frame_to_regfile(const esp_gdbstub_frame_t *frame, esp_gdbstub_gdb_regfile_t *dst)
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{
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init_regfile(dst);
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const uint32_t *a_regs = (const uint32_t *) &frame->a0;
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if (!(esp_ptr_executable(cpu_ll_pc_to_ptr(frame->pc)) && (frame->pc & 0xC0000000U))) {
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/* Xtensa ABI sets the 2 MSBs of the PC according to the windowed call size
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* Incase the PC is invalid, GDB will fail to translate addresses to function names
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* Hence replacing the PC to a placeholder address in case of invalid PC
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*/
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dst->pc = (uint32_t)&_invalid_pc_placeholder;
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} else {
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dst->pc = (uint32_t)cpu_ll_pc_to_ptr(frame->pc);
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}
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for (int i = 0; i < 16; i++) {
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dst->a[i] = a_regs[i];
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}
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for (int i = 16; i < 64; i++) {
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dst->a[i] = 0xDEADBEEF;
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}
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#if XCHAL_HAVE_LOOPS
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dst->lbeg = frame->lbeg;
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dst->lend = frame->lend;
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dst->lcount = frame->lcount;
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#endif
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dst->ps = (frame->ps & PS_UM) ? (frame->ps & ~PS_EXCM) : frame->ps;
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dst->sar = frame->sar;
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update_regfile_common(dst);
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}
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#ifdef CONFIG_ESP_GDBSTUB_SUPPORT_TASKS
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static void solicited_frame_to_regfile(const XtSolFrame *frame, esp_gdbstub_gdb_regfile_t *dst)
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{
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init_regfile(dst);
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const uint32_t *a_regs = (const uint32_t *) &frame->a0;
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if (!(esp_ptr_executable(cpu_ll_pc_to_ptr(frame->pc)) && (frame->pc & 0xC0000000U))) {
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dst->pc = (uint32_t)&_invalid_pc_placeholder;
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} else {
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dst->pc = (uint32_t)cpu_ll_pc_to_ptr(frame->pc);
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}
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/* only 4 registers saved in the solicited frame */
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for (int i = 0; i < 4; i++) {
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dst->a[i] = a_regs[i];
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}
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for (int i = 4; i < 64; i++) {
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dst->a[i] = 0xDEADBEEF;
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}
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dst->ps = (frame->ps & PS_UM) ? (frame->ps & ~PS_EXCM) : frame->ps;
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update_regfile_common(dst);
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}
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/* Represents FreeRTOS TCB structure */
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typedef struct {
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uint8_t *top_of_stack;
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/* Other members aren't needed */
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} dummy_tcb_t;
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void esp_gdbstub_tcb_to_regfile(TaskHandle_t tcb, esp_gdbstub_gdb_regfile_t *dst)
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{
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const dummy_tcb_t *dummy_tcb = (const dummy_tcb_t *) tcb;
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const XtExcFrame *frame = (XtExcFrame *) dummy_tcb->top_of_stack;
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if (frame->exit != 0) {
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esp_gdbstub_frame_to_regfile(frame, dst);
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} else {
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const XtSolFrame *taskFrame = (const XtSolFrame *) dummy_tcb->top_of_stack;
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solicited_frame_to_regfile(taskFrame, dst);
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}
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}
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#endif // CONFIG_ESP_GDBSTUB_SUPPORT_TASKS
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int esp_gdbstub_get_signal(const esp_gdbstub_frame_t *frame)
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{
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const char exccause_to_signal[] = {4, 31, 11, 11, 2, 6, 8, 0, 6, 7, 0, 0, 7, 7, 7, 7};
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if (frame->exccause > sizeof(exccause_to_signal)) {
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return 11;
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}
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return (int) exccause_to_signal[frame->exccause];
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}
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