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fix(esp_lcd): Issue where M5Stack CoreS3 uses GPIO 35 for MISO and LCD D/C
Adopts approach used by M5GFX that enables/diables output during SPI transaction.
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@@ -412,6 +412,9 @@ IRAM_ATTR static void lcd_spi_pre_trans_cb(spi_transaction_t *trans)
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if (spi_panel_io->dc_gpio_num >= 0) { // set D/C line level if necessary
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// use ll function to speed up
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gpio_ll_set_level(&GPIO, spi_panel_io->dc_gpio_num, lcd_trans->flags.dc_gpio_level);
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// ensure the D/C output is enabled
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gpio_ll_output_enable(&GPIO, spi_panel_io->dc_gpio_num);
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}
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}
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@@ -419,6 +422,12 @@ static void lcd_spi_post_trans_color_cb(spi_transaction_t *trans)
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{
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esp_lcd_panel_io_spi_t *spi_panel_io = trans->user;
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lcd_spi_trans_descriptor_t *lcd_trans = __containerof(trans, lcd_spi_trans_descriptor_t, base);
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// disable the D/C output as we no longer need it
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if (spi_panel_io->dc_gpio_num >= 0) {
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gpio_ll_output_disable(&GPIO, spi_panel_io->dc_gpio_num);
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}
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if (lcd_trans->flags.en_trans_done_cb) {
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if (spi_panel_io->on_color_trans_done) {
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spi_panel_io->on_color_trans_done(&spi_panel_io->base, NULL, spi_panel_io->user_ctx);
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