feat(interrupts): ESP32P4 ECO5 interrupt sources update

This commit is contained in:
Song Ruo Jing
2025-09-10 15:36:09 +08:00
parent e71732139a
commit a9b2bd1b72
5 changed files with 15 additions and 162 deletions

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@@ -10,7 +10,7 @@
#include "esp_newlib.h"
#include "sdkconfig.h"
#define TEST_MEMORY_LEAK_THRESHOLD (300)
#define TEST_MEMORY_LEAK_THRESHOLD (350)
void setUp(void)
{

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@@ -66,7 +66,7 @@ typedef struct vector_desc_t vector_desc_t;
struct shared_vector_desc_t {
int disabled: 1;
int source: 8;
int source: 16;
volatile uint32_t *statusreg;
uint32_t statusmask;
intr_handler_t isr;
@@ -94,7 +94,7 @@ struct vector_desc_t {
int flags: 16; //OR of VECDESC_FL_* defines
unsigned int cpu: 1;
unsigned int intno: 5;
int source: 8; //Interrupt mux flags, used when not shared
int source: 16; //Interrupt mux flags, used when not shared
shared_vector_desc_t *shared_vec_info; //used when VECDESC_FL_SHARED
vector_desc_t *next;
};

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -152,7 +152,14 @@ typedef enum {
ETS_H264_REG_INTR_SOURCE,
ETS_ASSIST_DEBUG_INTR_SOURCE,
ETS_MAX_INTR_SOURCE, /**< number of interrupt sources */
// The following sources' int_map_reg addr are not continuous with previous ones (check interrupt_core0/1_struct.h),
// but esp_rom_route_intr_matrix and interrupt_clic_ll_route assume all int_map_reg addr are continuous.
// Therefore, the workaround is to give the three new interrupt sources ID numbers that match with the corresponding correct addresses.
ETS_DMA2D_IN_CH2_INTR_SOURCE = 133, /**< This interrupt source only exists on chip ver. >= 3.0 */
ETS_DMA2D_OUT_CH3_INTR_SOURCE, /**< This interrupt source only exists on chip ver. >= 3.0 */
ETS_AXI_PERF_MON_INTR_SOURCE, /**< This interrupt source only exists on chip ver. >= 3.0 */
ETS_MAX_INTR_SOURCE, /**< number of interrupt sources (this value is larger than the real number of sources on ver. less than 3.0, but it should be fine)*/
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));

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@@ -135,4 +135,7 @@ const char *const esp_isr_names[] = {
[ETS_H264_DMA2D_IN_CH5_INTR_SOURCE] = "H264_DMA2D_IN_CH5",
[ETS_H264_REG_INTR_SOURCE] = "H264_REG",
[ETS_ASSIST_DEBUG_INTR_SOURCE] = "ASSIST_DEBUG",
[ETS_DMA2D_IN_CH2_INTR_SOURCE] = "DMA2D_IN_CH2", /* This interrupt source only exists on chip ver. >= 3.0 */
[ETS_DMA2D_OUT_CH3_INTR_SOURCE] = "DMA2D_OUT_CH3", /* This interrupt source only exists on chip ver. >= 3.0 */
[ETS_AXI_PERF_MON_INTR_SOURCE] = "AXI_PERF_MON", /* This interrupt source only exists on chip ver. >= 3.0 */
};

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@@ -1,157 +0,0 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
//Interrupt hardware source table
//This table is decided by hardware, don't touch this.
typedef enum {
ETS_LP_RTC_INT_SOURCE,
ETS_LP_WDT_INT_SOURCE,
ETS_LP_TIMER_REG_0_INT_SOURCE,
ETS_LP_TIMER_REG_1_INT_SOURCE,
ETS_MB_HP_INT_SOURCE,
ETS_MB_LP_INT_SOURCE,
ETS_PMU_REG_0_INT_SOURCE,
ETS_PMU_REG_1_INT_SOURCE,
ETS_LP_ANAPERI_INT_SOURCE,
ETS_LP_ADC_INT_SOURCE,
ETS_LP_GPIO_INT_SOURCE,
ETS_LP_I2C_INT_SOURCE,
ETS_LP_I2S_INT_SOURCE,
ETS_LP_SPI_INT_SOURCE,
ETS_LP_TOUCH_INT_SOURCE,
ETS_LP_TSENS_INT_SOURCE,
ETS_LP_UART_INT_SOURCE,
ETS_LP_EFUSE_INT_SOURCE,
ETS_LP_SW_INT_SOURCE,
ETS_LP_SYSREG_INT_SOURCE,
ETS_LP_HUK_INT_SOURCE,
ETS_SYS_ICM_INT_SOURCE,
ETS_USB_DEVICE_INT_SOURCE,
ETS_SDIO_HOST_INT_SOURCE,
ETS_GDMA_INT_SOURCE,
ETS_SPI2_INT_SOURCE,
ETS_SPI3_INT_SOURCE,
ETS_I2S0_INT_SOURCE,
ETS_I2S1_INT_SOURCE,
ETS_I2S2_INT_SOURCE,
ETS_UHCI0_INT_SOURCE,
ETS_UART0_INT_SOURCE,
ETS_UART1_INT_SOURCE,
ETS_UART2_INT_SOURCE,
ETS_UART3_INT_SOURCE,
ETS_UART4_INT_SOURCE,
ETS_LCD_CAM_INT_SOURCE,
ETS_ADC_INT_SOURCE,
ETS_PWM0_INT_SOURCE,
ETS_PWM1_INT_SOURCE,
ETS_TWAI0_INT_SOURCE,
ETS_TWAI1_INT_SOURCE,
ETS_TWAI2_INT_SOURCE,
ETS_RMT_INT_SOURCE,
ETS_I2C0_INT_SOURCE,
ETS_I2C1_INT_SOURCE,
ETS_TIMERGRP0_T0_INT_SOURCE,
ETS_TIMERGRP0_T1_INT_SOURCE,
ETS_TIMERGRP0_WDT_INT_SOURCE,
ETS_TIMERGRP1_T0_INT_SOURCE,
ETS_TIMERGRP1_T1_INT_SOURCE,
ETS_TIMERGRP1_WDT_INT_SOURCE,
ETS_LEDC_INT_SOURCE,
ETS_SYSTIMER_TARGET0_INT_SOURCE,
ETS_SYSTIMER_TARGET1_INT_SOURCE,
ETS_SYSTIMER_TARGET2_INT_SOURCE,
ETS_AHB_PDMA_IN_CH0_INT_SOURCE,
ETS_AHB_PDMA_IN_CH1_INT_SOURCE,
ETS_AHB_PDMA_IN_CH2_INT_SOURCE,
ETS_AHB_PDMA_OUT_CH0_INT_SOURCE,
ETS_AHB_PDMA_OUT_CH1_INT_SOURCE,
ETS_AHB_PDMA_OUT_CH2_INT_SOURCE,
ETS_AXI_PDMA_IN_CH0_INT_SOURCE,
ETS_AXI_PDMA_IN_CH1_INT_SOURCE,
ETS_AXI_PDMA_IN_CH2_INT_SOURCE,
ETS_AXI_PDMA_OUT_CH0_INT_SOURCE,
ETS_AXI_PDMA_OUT_CH1_INT_SOURCE,
ETS_AXI_PDMA_OUT_CH2_INT_SOURCE,
ETS_RSA_INT_SOURCE,
ETS_AES_INT_SOURCE,
ETS_SHA_INT_SOURCE,
ETS_ECC_INT_SOURCE,
ETS_ECDSA_INT_SOURCE,
ETS_KM_INT_SOURCE,
ETS_GPIO_INT0_SOURCE,
ETS_GPIO_INT1_SOURCE,
ETS_GPIO_INT2_SOURCE,
ETS_GPIO_INT3_SOURCE,
ETS_GPIO_PAD_COMP_INT_SOURCE,
ETS_CPU_INT_FROM_CPU_0_SOURCE,
ETS_CPU_INT_FROM_CPU_1_SOURCE,
ETS_CPU_INT_FROM_CPU_2_SOURCE,
ETS_CPU_INT_FROM_CPU_3_SOURCE,
ETS_CACHE_INT_SOURCE,
ETS_FLASH_MSPI_INT_SOURCE,
ETS_CSI_BRIDGE_INT_SOURCE,
ETS_DSI_BRIDGE_INT_SOURCE,
ETS_CSI_INT_SOURCE,
ETS_DSI_INT_SOURCE,
ETS_GMII_PHY_INT_SOURCE,
ETS_LPI_INT_SOURCE,
ETS_PMT_INT_SOURCE,
ETS_SBD_INT_SOURCE,
ETS_USB_OTG_INT_SOURCE,
ETS_USB_OTG_ENDP_MULTI_PROC_INT_SOURCE,
ETS_JPEG_INT_SOURCE,
ETS_PPA_INT_SOURCE,
ETS_CORE0_TRACE_INT_SOURCE,
ETS_CORE1_TRACE_INT_SOURCE,
ETS_HP_CORE_CTRL_INT_SOURCE,
ETS_ISP_INT_SOURCE,
ETS_I3C_MST_INT_SOURCE,
ETS_I3C_SLV_INT_SOURCE,
ETS_USB_OTG11_INT_SOURCE,
ETS_DMA2D_IN_CH0_INT_SOURCE,
ETS_DMA2D_IN_CH1_INT_SOURCE,
ETS_DMA2D_OUT_CH0_INT_SOURCE,
ETS_DMA2D_OUT_CH1_INT_SOURCE,
ETS_DMA2D_OUT_CH2_INT_SOURCE,
ETS_PSRAM_MSPI_INT_SOURCE,
ETS_HP_SYSREG_INT_SOURCE,
ETS_PCNT_INT_SOURCE,
ETS_HP_PAU_INT_SOURCE,
ETS_HP_PARLIO_RX_INT_SOURCE,
ETS_HP_PARLIO_TX_INT_SOURCE,
ETS_H264_DMA2D_OUT_CH0_INT_SOURCE,
ETS_H264_DMA2D_OUT_CH1_INT_SOURCE,
ETS_H264_DMA2D_OUT_CH2_INT_SOURCE,
ETS_H264_DMA2D_OUT_CH3_INT_SOURCE,
ETS_H264_DMA2D_OUT_CH4_INT_SOURCE,
ETS_H264_DMA2D_IN_CH0_INT_SOURCE,
ETS_H264_DMA2D_IN_CH1_INT_SOURCE,
ETS_H264_DMA2D_IN_CH2_INT_SOURCE,
ETS_H264_DMA2D_IN_CH3_INT_SOURCE,
ETS_H264_DMA2D_IN_CH4_INT_SOURCE,
ETS_H264_DMA2D_IN_CH5_INT_SOURCE,
ETS_H264_REG_INT_SOURCE,
ETS_ASSIST_DEBUG_INT_SOURCE,
ETS_DMA2D_IN_CH2_INT_SOURCE,
ETS_DMA2D_OUT_CH3_INT_SOURCE,
ETS_AXI_PERF_MON_INT_SOURCE,
ETS_MAX_INTR_SOURCE,
} periph_interrupt_t;
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];
#ifdef __cplusplus
}
#endif