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fix(i2s_pdm): fixed pdm multi slot clock issue

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Fixed the sample rate slow down issue when using more than 4 slots in  pdm rx mode.
This commit is contained in:
laokaiyao
2025-07-28 17:50:39 +08:00
committed by Kevin (Lao Kaiyao)
parent 39b9662258
commit be129ca8f4
2 changed files with 10 additions and 3 deletions
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12
components/esp_driver_i2s/i2s_pdm.c
View File

@@ -363,13 +363,17 @@ err:
#if SOC_I2S_SUPPORTS_PDM_RX
#define I2S_PDM_RX_BCLK_DIV_MIN 8 /*!< The minimum bclk_div for PDM RX mode */
#define I2S_PDM_RX_CLK_LIMIT_COEFF 128 /*!< The coefficient for the clock limitation */
static esp_err_t i2s_pdm_rx_calculate_clock(i2s_chan_handle_t handle, const i2s_pdm_rx_clk_config_t *clk_cfg, i2s_hal_clock_info_t *clk_info)
{
i2s_pdm_rx_slot_config_t *slot_cfg = &((i2s_pdm_rx_config_t *)(handle->mode_info))->slot_cfg;
uint32_t slot_num = __builtin_popcount(slot_cfg->slot_mask);
uint32_t rate = clk_cfg->sample_rate_hz;
i2s_pdm_rx_clk_config_t *pdm_rx_clk = (i2s_pdm_rx_clk_config_t *)clk_cfg;
uint32_t dn_sample_factor = I2S_LL_PDM_BCK_FACTOR * (pdm_rx_clk->dn_sample_mode == I2S_PDM_DSR_16S ? 2 : 1);
if (!handle->is_raw_pdm) {
clk_info->bclk = rate * I2S_LL_PDM_BCK_FACTOR * (pdm_rx_clk->dn_sample_mode == I2S_PDM_DSR_16S ? 2 : 1);
clk_info->bclk = rate * dn_sample_factor;
} else {
/* Mainly warns the case when the user uses the raw PDM mode but set a PCM sample rate
* The typical PDM over sample rate is several MHz (above 1 MHz),
@@ -379,7 +383,9 @@ static esp_err_t i2s_pdm_rx_calculate_clock(i2s_chan_handle_t handle, const i2s_
}
clk_info->bclk = rate * 2;
}
clk_info->bclk_div = clk_cfg->bclk_div < I2S_PDM_RX_BCLK_DIV_MIN ? I2S_PDM_RX_BCLK_DIV_MIN : clk_cfg->bclk_div;
/* Hardware limitation: bclk_div * dn_sample_factor / slot_num >= 96 */
uint32_t bclk_limit = (I2S_PDM_RX_CLK_LIMIT_COEFF * slot_num + dn_sample_factor - 1) / dn_sample_factor;
clk_info->bclk_div = MAX(MAX(bclk_limit, I2S_PDM_RX_BCLK_DIV_MIN), clk_cfg->bclk_div);
clk_info->mclk = clk_info->bclk * clk_info->bclk_div;
clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk);
clk_info->mclk_div = clk_info->sclk / clk_info->mclk;

1
components/esp_driver_i2s/i2s_private.h
View File

@@ -64,6 +64,7 @@ extern "C" {
#define I2S_USE_RETENTION_LINK (SOC_I2S_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)
#define I2S_NULL_POINTER_CHECK(tag, p) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, tag, "input parameter '"#p"' is NULL")
#define MAX(a, b) ((a) > (b) ? (a) : (b))
/**
* @brief i2s channel state for checking if the operation in under right driver state