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soc: add soc headers from S3 fpga bringup branch

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This commit is contained in:
Marius Vikhammer
2021-03-17 18:47:51 +08:00
parent 8c4d9fa66e
commit e2919eca8e
73 changed files with 54415 additions and 37342 deletions
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158
components/soc/esp32s3/include/soc/timer_group_struct.h
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@@ -11,8 +11,8 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifndef _SOC_TIMG_STRUCT_H_
#define _SOC_TIMG_STRUCT_H_
#ifdef __cplusplus
extern "C" {
#endif
@@ -23,143 +23,143 @@ typedef volatile struct {
struct {
union {
struct {
uint32_t reserved0: 9;
uint32_t use_xtal: 1;
uint32_t alarm_en: 1;
uint32_t reserved11: 1;
uint32_t reserved12: 1;
uint32_t divider: 16;
uint32_t autoreload: 1;
uint32_t increase: 1;
uint32_t enable: 1;
uint32_t reserved0 : 9;
uint32_t use_xtal : 1;
uint32_t alarm_en : 1;
uint32_t reserved11 : 1;
uint32_t reserved12 : 1;
uint32_t divider : 16;
uint32_t autoreload : 1;
uint32_t increase : 1;
uint32_t enable : 1;
};
uint32_t val;
} config;
uint32_t cnt_low; /**/
uint32_t cnt_low;
union {
struct {
uint32_t hi: 22;
uint32_t reserved22: 10;
uint32_t hi : 22;
uint32_t reserved22 : 10;
};
uint32_t val;
} cnt_high;
union {
struct {
uint32_t reserved0: 31;
uint32_t update: 1;
uint32_t reserved0 : 31;
uint32_t update : 1;
};
uint32_t val;
} update;
uint32_t alarm_low; /**/
uint32_t alarm_low;
union {
struct {
uint32_t alarm_hi: 22;
uint32_t reserved22: 10;
uint32_t alarm_hi : 22;
uint32_t reserved22 : 10;
};
uint32_t val;
} alarm_high;
uint32_t load_low; /**/
uint32_t load_low;
union {
struct {
uint32_t load_hi: 22;
uint32_t reserved22: 10;
uint32_t load_hi : 22;
uint32_t reserved22 : 10;
};
uint32_t val;
} load_high;
uint32_t reload; /**/
uint32_t reload;
} hw_timer[2];
union {
struct {
uint32_t reserved0: 12;
uint32_t appcpu_reset_en: 1;
uint32_t procpu_reset_en: 1;
uint32_t flashboot_mod_en: 1;
uint32_t sys_reset_length: 3;
uint32_t cpu_reset_length: 3;
uint32_t reserved21: 1;
uint32_t reserved22: 1;
uint32_t stg3: 2;
uint32_t stg2: 2;
uint32_t stg1: 2;
uint32_t stg0: 2;
uint32_t en: 1;
uint32_t reserved0 : 12;
uint32_t appcpu_reset_en : 1;
uint32_t procpu_reset_en : 1;
uint32_t flashboot_mod_en : 1;
uint32_t sys_reset_length : 3;
uint32_t cpu_reset_length : 3;
uint32_t reserved21 : 1;
uint32_t reserved22 : 1;
uint32_t stg3 : 2;
uint32_t stg2 : 2;
uint32_t stg1 : 2;
uint32_t stg0 : 2;
uint32_t en : 1;
};
uint32_t val;
} wdt_config0;
union {
struct {
uint32_t reserved0: 16;
uint32_t clk_prescale: 16;
uint32_t reserved0 : 16;
uint32_t clk_prescale : 16;
};
uint32_t val;
} wdt_config1;
uint32_t wdt_config2; /**/
uint32_t wdt_config3; /**/
uint32_t wdt_config4; /**/
uint32_t wdt_config5; /**/
uint32_t wdt_feed; /**/
uint32_t wdt_wprotect; /**/
uint32_t wdt_config2;
uint32_t wdt_config3;
uint32_t wdt_config4;
uint32_t wdt_config5;
uint32_t wdt_feed;
uint32_t wdt_wprotect;
union {
struct {
uint32_t reserved0: 12;
uint32_t start_cycling: 1;
uint32_t clk_sel: 2;
uint32_t rdy: 1;
uint32_t max: 15;
uint32_t start: 1;
uint32_t reserved0 : 12;
uint32_t start_cycling : 1;
uint32_t clk_sel : 2;
uint32_t rdy : 1;
uint32_t max : 15;
uint32_t start : 1;
};
uint32_t val;
} rtc_cali_cfg;
union {
struct {
uint32_t cycling_data_vld: 1;
uint32_t reserved1: 6;
uint32_t value: 25;
uint32_t cycling_data_vld : 1;
uint32_t reserved1 : 6;
uint32_t value : 25;
};
uint32_t val;
} rtc_cali_cfg1;
union {
struct {
uint32_t t0: 1;
uint32_t t1: 1;
uint32_t wdt: 1;
uint32_t reserved3: 29;
uint32_t t0 : 1;
uint32_t t1 : 1;
uint32_t wdt : 1;
uint32_t reserved3 : 29;
};
uint32_t val;
} int_ena;
union {
struct {
uint32_t t0: 1;
uint32_t t1: 1;
uint32_t wdt: 1;
uint32_t reserved3: 29;
uint32_t t0 : 1;
uint32_t t1 : 1;
uint32_t wdt : 1;
uint32_t reserved3 : 29;
};
uint32_t val;
} int_raw;
union {
struct {
uint32_t t0: 1;
uint32_t t1: 1;
uint32_t wdt: 1;
uint32_t reserved3: 29;
uint32_t t0 : 1;
uint32_t t1 : 1;
uint32_t wdt : 1;
uint32_t reserved3 : 29;
};
uint32_t val;
} int_st;
union {
struct {
uint32_t t0: 1;
uint32_t t1: 1;
uint32_t wdt: 1;
uint32_t reserved3: 29;
uint32_t t0 : 1;
uint32_t t1 : 1;
uint32_t wdt : 1;
uint32_t reserved3 : 29;
};
uint32_t val;
} int_clr;
union {
struct {
uint32_t timeout: 1; /*timeout indicator*/
uint32_t reserved1: 2;
uint32_t timeout_rst_cnt: 4; /*Cycles that release calibration timeout reset*/
uint32_t timeout_thres: 25; /*timeout if cali value counts over threshold*/
uint32_t timeout : 1; /*timeout indicator*/
uint32_t reserved1 : 2;
uint32_t timeout_rst_cnt : 4; /*Cycles that release calibration timeout reset*/
uint32_t timeout_thres : 25; /*timeout if cali value counts over threshold*/
};
uint32_t val;
} rtc_cali_cfg2;
@@ -194,23 +194,23 @@ typedef volatile struct {
uint32_t reserved_f4;
union {
struct {
uint32_t date: 28;
uint32_t reserved28: 4;
uint32_t date : 28;
uint32_t reserved28 : 4;
};
uint32_t val;
} timg_date;
union {
struct {
uint32_t reserved0: 31;
uint32_t en: 1;
uint32_t reserved0 : 31;
uint32_t clk_en : 1;
};
uint32_t val;
} clk;
} timg_dev_t;
extern timg_dev_t TIMERG0;
extern timg_dev_t TIMERG1;
#ifdef __cplusplus
}
#endif
#endif /* _SOC_TIMG_STRUCT_H_ */