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bugfix: fix uart fifo lost data issue

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This commit is contained in:
wuzhenghui
2022-11-09 19:17:35 +08:00
committed by laokaiyao
parent 26e5d16c47
commit e90d76e5b7
2 changed files with 3 additions and 4 deletions
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4
components/hal/esp32c6/include/hal/uart_ll.h
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@@ -271,7 +271,7 @@ static inline uint32_t uart_ll_get_intr_ena_status(uart_dev_t *hw)
static inline void uart_ll_read_rxfifo(uart_dev_t *hw, uint8_t *buf, uint32_t rd_len) static inline void uart_ll_read_rxfifo(uart_dev_t *hw, uint8_t *buf, uint32_t rd_len)
{ {
for (int i = 0; i < (int)rd_len; i++) { for (int i = 0; i < (int)rd_len; i++) {
buf[i] = HAL_FORCE_READ_U32_REG_FIELD(hw->fifo, rxfifo_rd_byte); buf[i] = hw->fifo.rxfifo_rd_byte;
} }
} }
@@ -287,7 +287,7 @@ static inline void uart_ll_read_rxfifo(uart_dev_t *hw, uint8_t *buf, uint32_t rd
static inline void uart_ll_write_txfifo(uart_dev_t *hw, const uint8_t *buf, uint32_t wr_len) static inline void uart_ll_write_txfifo(uart_dev_t *hw, const uint8_t *buf, uint32_t wr_len)
{ {
for (int i = 0; i < (int)wr_len; i++) { for (int i = 0; i < (int)wr_len; i++) {
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->fifo, rxfifo_rd_byte, buf[i]); hw->fifo.rxfifo_rd_byte = buf[i];
} }
} }

3
components/soc/esp32c6/include/soc/uart_struct.h
View File

@@ -19,8 +19,7 @@ typedef union {
/** rxfifo_rd_byte : RO; bitpos: [7:0]; default: 0; /** rxfifo_rd_byte : RO; bitpos: [7:0]; default: 0;
* UART $n accesses FIFO via this register. * UART $n accesses FIFO via this register.
*/ */
uint32_t rxfifo_rd_byte:8; uint32_t rxfifo_rd_byte:32;
uint32_t reserved_8:24;
}; };
uint32_t val; uint32_t val;
} uart_fifo_reg_t; } uart_fifo_reg_t;