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3833 Commits

Author SHA1 Message Date
Jiang Jiang Jian
9b74192f14 Merge branch 'fix/update_breakpoint_nums_on_c5_h4_v6.0' into 'release/v6.0' 
fix(soc): update breakpoint nums on c5 and h4 (v6.0)

See merge request espressif/esp-idf!44355
 2025-12-21 15:30:36 +08:00
Jiang Jiang Jian
0f7ae73276 Merge branch 'feat/isp_driver_use_four_cc_v6.0' into 'release/v6.0' 
isp: use fourcc for isp color formats (v6.0)

See merge request espressif/esp-idf!44353
 2025-12-21 15:29:48 +08:00
Jiang Jiang Jian
f409428bf3 Merge branch 'bugfix/esp32c5_encrypted_flash_write_v6.0' into 'release/v6.0' 
fix(spi_flash): Add CPU frequency switching during flash encrypted write (v6.0)

See merge request espressif/esp-idf!44304
 2025-12-21 15:28:33 +08:00
Jiang Jiang Jian
ff9d18afea Merge branch 'fix/p4_fixed_mdc_config_v6.0' into 'release/v6.0' 
fix(esp_eth): fixed ESP32P4 CSR clock range used to determine MDC (v6.0)

See merge request espressif/esp-idf!44224
 2025-12-21 15:19:34 +08:00
Jiang Jiang Jian
bef4d8c5ae Merge branch 'feature/support_7.6.1_pvt_auto_dbias_v6.0' into 'release/v6.0' 
feat(esp32c6): auto adjust LDO voltage using pvt function (v6.0)

See merge request espressif/esp-idf!44103
 2025-12-21 14:55:30 +08:00
Chen Jichang
23f1428356 fix(soc): update breakpoint nums on c5 and h4 2025-12-18 11:21:48 +08:00
armando
0e6c5ef4fd refactor(isp): use fourcc for isp color formats 2025-12-18 09:21:36 +08:00
Chen Jichang
10c473fbbd feat(hal): graudate the RMT hal driver into a new component 2025-12-17 22:31:25 +08:00
morris
c740652f3d Merge branch 'feat/esp_hal_isp_v6.0' into 'release/v6.0' 
isp: move isp hal to cam hal (v6.0)

See merge request espressif/esp-idf!44134
 2025-12-17 18:52:30 +08:00
morris
311bec8f82 Merge branch 'fix/spi_edma_and_hal_component_6.0' into 'release/v6.0' 
feat(driver_spi): split esp_hal_gpspi and support master driver edma (v6.0)

See merge request espressif/esp-idf!44222
 2025-12-17 14:54:05 +08:00
Xiao Xufeng
ae7124abe3 feat(spi_flash): implement dynamic CPU frequency switching workaround for encrypted writes 
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes

Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
  CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
  use SPI1 and must work correctly at reduced CPU frequencies

Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
  hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases

This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
 2025-12-17 01:21:45 +08:00
Ondrej Kosta
20a004f141 fix(esp_eth): fixes EMAC MDC out of the range issue 
Closes https://github.com/espressif/esp-idf/issues/17984
 2025-12-16 14:12:17 +01:00
wanckl
d12f941787 feat(driver_spi): split spi hal component 2025-12-16 20:38:09 +08:00
armando
d65621fef3 feat(hal):graudate the isp hal driver into a new component 2025-12-16 14:24:40 +08:00
Chen Chen
1b015d22eb refactor(esp_system): clear dependency on hal components 2025-12-16 09:11:59 +08:00
Island
068473abc8 Merge branch 'fix/add_soc_caps_for_pawr_feat_v6.0' into 'release/v6.0' 
fix(ble): add soc caps feat for PAwR (v6.0)

See merge request espressif/esp-idf!44151
 2025-12-15 14:23:28 +08:00
Jiang Jiang Jian
e1d2625a09 Merge branch 'bugfix/fix_regdma_data_race_v6.0' into 'release/v6.0' 
fix: add mutex protection for software trigger RegDMA start to avoid data races V6.0

See merge request espressif/esp-idf!44169
 2025-12-15 11:31:16 +08:00
morris
36134f6464 Merge branch 'refactor/ppa_dma2d_fourcc_v6.0' into 'release/v6.0' 
refactor(ppa): use fourcc for dma2d and ppa color formats (v6.0)

See merge request espressif/esp-idf!44128
 2025-12-12 12:23:22 +08:00
sibeibei
7d013fb36d fix: add mutex protection for software trigger RegDMA start to avoid data races 2025-12-11 20:31:50 +08:00
morris
946dcf73e3 Merge branch 'feature/graduate_i2s_parlio_analog_hal_components_v6.0' into 'release/v6.0' 
Feature/graduate i2s parlio analog hal components v6.0

See merge request espressif/esp-idf!44043
 2025-12-11 16:58:37 +08:00
Jin Chen
5c6a0f4c8c fix(ble): add soc caps config for pawr feat on ESP32C61 
(cherry picked from commit d667a41826)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:22 +08:00
Jin Chen
77ef80081d fix(ble): add soc caps config for pawr feat on ESP32C5 
(cherry picked from commit 19130df4f3)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:22 +08:00
Jin Chen
bf7d2e1a22 fix(ble): add soc caps config for pawr feat on ESP32H2 
(cherry picked from commit 2eb79c71f1)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:21 +08:00
Jin Chen
7f3cc18198 fix(ble): add soc caps config for pawr feat on ESP32C6 
(cherry picked from commit 4e4b863299)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:20 +08:00
Song Ruo Jing
190c081160 refactor(ppa): use fourcc for dma2d and ppa color formats 2025-12-11 15:20:11 +08:00
Jiang Jiang Jian
3df1ee13fb Merge branch 'fix/fix_mspi_write_stuck_after_reset_v6.0' into 'release/v6.0' 
fix(esp_system): fix mspi write stuck after cpu/digital reset on c5/c61 (v6.0)

See merge request espressif/esp-idf!43994
 2025-12-11 13:59:25 +08:00
morris
11ce7a9011 refactor(soc): remove soc_caps_full.h 2025-12-11 10:29:01 +08:00
laokaiyao
841cb4caa1 feat(hal): graudate the adc/dac hal driver into a new component 2025-12-11 10:27:00 +08:00
laokaiyao
55537c99db feat(hal): graudate the ana_cmpr hal driver into a new component 2025-12-11 10:27:00 +08:00
laokaiyao
9657fde797 feat(hal): graudate the touch sensor hal driver into a new component 2025-12-11 10:26:55 +08:00
laokaiyao
b8824d2d1a refactor(parlio): refactor of the private parlio caps 2025-12-11 10:26:07 +08:00
laokaiyao
e964c74618 feat(hal): graudate the parlio hal driver into a new component 2025-12-11 10:26:05 +08:00
laokaiyao
73ebd544fd refactor(i2s): refactor of the private i2s caps 2025-12-11 10:25:42 +08:00
laokaiyao
fd918efe43 feat(hal): graudate the I2S hal driver into a new component 2025-12-11 10:25:40 +08:00
zlq
8640b79ab8 feat(esp32c6): auto adjust LDO voltage using pvt function 2025-12-10 14:11:51 +08:00
morris
37c614d626 feat(twai): graduate the hal drivers into esp_hal_twai component 2025-12-10 13:56:47 +08:00
wuzhenghui
01ec965252 fix(esp_system): fix mspi write stuck after cpu/digital reset on c5/c61 2025-12-10 12:21:55 +08:00
morris
4ca7b95d83 Merge branch 'refactor/esp_hal_gpio_v6.0' into 'release/v6.0' 
refactor(gpio): split GPIO HAL into separate component (v6.0)

See merge request espressif/esp-idf!43895
 2025-12-09 16:02:49 +08:00
Alexey Gerenkov
effa1e4248 Merge branch 'feature/update-toolchain-to-esp-15.2.0_20250929.4-6d3fdb7_v6.0' into 'release/v6.0' 
Make Picolibc the default libc (v6.0)

See merge request espressif/esp-idf!43966
 2025-12-08 18:13:08 +08:00
Song Ruo Jing
4d3a9b0157 refactor(esp_hal_gpio): move some caps definitions to esp_hal_gpio 2025-12-08 14:33:26 +08:00
Song Ruo Jing
62899cbba6 refactor(gpio): split GPIO HAL into separate component 
cleaned up some includes in GPIO peripheral files
 2025-12-08 14:33:26 +08:00
morris
c231e0e777 Merge branch 'refactor/bitscrambler_in_esp_hal_dma_v6.0' into 'release/v6.0' 
refactor(hal): bitscrambler hal -> esp_hal_dma, usj hal -> esp_hal_usb (v6.0)

See merge request espressif/esp-idf!43700
 2025-12-08 11:15:27 +08:00
Alexey Lapshin
ad7f4b9670 feat(esp_libc): make picolibc default libc 2025-12-06 00:08:35 +07:00
Roland Dobai
093c5f0b01 Merge branch 'fix/core_system_fixes_for_p4_eco5_v6_0' into 'release/v6.0' 
Core System fixes for p4 eco5 (v6.0)

See merge request espressif/esp-idf!43629
 2025-11-27 10:15:03 +01:00
morris
69a76c5170 refactor(hal_dma): move bitscrambler from hal component 
because bitscrambler can't live without DMA, it's highly binded with the
GDMA peripheral.
 2025-11-27 16:06:52 +08:00
morris
88c6d19ad2 Merge branch 'feat/esp_hal_cam_v6.0' into 'release/v6.0' 
cam:graudate the camera hal driver into a new component (v6.0)

See merge request espressif/esp-idf!43578
 2025-11-27 14:25:15 +08:00
armando
dfe4a6e5f7 feat(hal):graudate the camera hal driver into a new component 2025-11-26 08:42:12 +08:00
gaoxu
b32eab1bd7 feat(rng): support P4 ECO5 TRNG 2025-11-25 17:49:43 +08:00
Konstantin Kondrashov
ed6f89f90a fix(efuse): Adds missing SOC defines for ESP32-P4 v3 2025-11-25 13:35:51 +05:30
Marius Vikhammer
2c54fd0738 fix(interrupts): fixed interrupted related issues due to ZCMP on P4 ECO5 2025-11-25 13:35:51 +05:30