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841 Commits

Author SHA1 Message Date
Song Ruo Jing
6bfdc93593 feat(uart): add DTR and DSR signals support for UART 2025-08-05 16:45:46 +08:00
Gao Xu
9ac4a3400c Merge branch 'refactor/rng_ll_s3' into 'master' 
refactor(rng): refactor to use hal/ll apis for S3

Closes IDF-12536

See merge request espressif/esp-idf!39585
 2025-07-31 11:41:21 +08:00
Song Ruo Jing
a4bd638385 refactor(uart): use U0RXD_GPIO_NUM and U0TXD_GPIO_NUM macros when possible 2025-07-29 21:59:49 +08:00
Song Ruo Jing
0787da6eea fix(console): release default console UART pins if console is switched in bootloader 
Also print out console UART pin number in app cpu_startup stage

Closes https://github.com/espressif/esp-idf/issues/16764
 2025-07-29 21:59:10 +08:00
gaoxu
9a57629e73 refactor(rng): refactor to use hal/ll apis for S3 2025-07-29 09:52:54 +08:00
Mahavir Jain
22adc7ed75 Merge branch 'feat/secure_boot_ecdsa_p384' into 'master' 
Support Secure Boot using ECDSA-P384 curve

Closes IDF-10016, IDF-10221, and IDF-12990

See merge request espressif/esp-idf!38517
 2025-07-24 11:59:59 +05:30
Aditya Patwardhan
03ffe90f95 feat(soc): Added soc capabilities related to RNG for ESP32C5 2025-07-23 14:22:09 +05:30
harshal.patil
130e72f82b feat(bootloader_support): Support Secure Boot using ECDSA-P384 curve 2025-07-21 09:19:42 +05:30
harshal.patil
03ea07155a change(bootloader_support/secure_boot): Allow NULL as verified_digest for app build 
The esp_secure_boot_verify_sbv2_signature_block() and esp_secure_boot_verify_rsa_signature_block()
APIs need and use the verified_digest argument only for BOOTLOADER_BUILD, but the argument is
not used in the application code, and the value present in verified_digest is considered invalid.
Thus, allow passing NULL as the verified_digest parameter to help some save space.
 2025-07-21 09:19:42 +05:30
harshal.patil
3f9ab5d5e7 fix(bootloader_support/secure_boot): Fix incorrect usage of ESP_SECURE_BOOT_KEY_DIGEST_LEN 2025-07-21 09:19:42 +05:30
Song Ruo Jing
3519fbd30b Merge branch 'feature/esp32h4_clock_support' into 'master' 
feat(clk): Add basic clock support for esp32h4

Closes IDF-12285, IDF-12912, and IDF-12499

See merge request espressif/esp-idf!40166
 2025-07-11 15:51:43 +08:00
Armando (Dou Yiwen)
c5a7513cb8 Merge branch 'feat/p4_eco5_fpga' into 'master' 
esp32p4: eco5 support on FPGA

See merge request espressif/esp-idf!39917
 2025-07-11 01:27:22 +00:00
Song Ruo Jing
28df79aee8 feat(clk): Add basic clock support for esp32h4 2025-07-10 16:35:53 +08:00
armando
bcf04e356b resolve comments, to squash 2025-07-10 06:24:32 +00:00
armando
dfb0662de2 feat(esp32p4): support eco5 on fpga 2025-07-10 06:24:32 +00:00
morris
c4d7b1cfce refactor(uart)!: deprcated esp_rom_uart.h 2025-07-08 18:56:17 +08:00
Harshal Patil
78faa2535c Merge branch 'feat/support_key_manager_esp32c5' into 'master' 
Support key manager esp32c5

Closes IDF-12626, IDF-12628, IDF-12629, IDF-8621, IDF-9007, IDF-12855, IDF-9070, IDF-7902, and IDF-7548

See merge request espressif/esp-idf!38894
 2025-07-01 11:36:19 +05:30
Aditya Patwardhan
662d793f37 feat(esp_security): Added support for key manager for esp32c5 2025-06-27 15:15:26 +05:30
Song Ruo Jing
cde716e093 feat(regi2c): add regi2c support for esp32h4 2025-06-27 17:18:33 +08:00
Alexey Lapshin
86ca6ef829 fix(build): fix -Wanalyzer-undefined-behavior-ptrdiff warnings 2025-06-25 18:00:39 +07:00
Nebojsa Cvetkovic
d0ceef20f4 refactor(xtensa): Rename specreg.h register macros 
This commit renames all registers in xtensa/specreg.h to by adding the
prefix XT_REG_. This is done to avoid naming collisions with similar
variable names. A new register file, viz., xt_specreg.h is created. The
previous names are still available to use but have been deprecated.

Closes https://github.com/espressif/esp-idf/issues/12723
Merges https://github.com/espressif/esp-idf/pull/16040
 2025-06-17 15:37:33 +02:00
Song Ruo Jing
6d293c8582 feat(clk): Add basic clock support for esp32h21 2025-06-16 15:05:32 +08:00
Konstantin Kondrashov
3a7c1a2e74 feat(bootloader): Bootloader OTA update with recovery bootloader feat 2025-06-12 18:47:33 +08:00
Laukik Hase
0d8a1f5427 refactor(hal): Refactor the APM LL/HAL APIs 2025-06-06 18:28:47 +05:30
nilesh.kale
0fb8c2a9b8 feat: enabled ECDSA-P192 support for ESP32H2 2025-05-22 14:55:03 +05:30
Song Ruo Jing
0631340e2c Merge branch 'feature/esp32h21_regi2c_support' into 'master' 
feat(regi2c): add regi2c support for esp32h21

Closes IDF-11550 and IDF-11858

See merge request espressif/esp-idf!37369
 2025-05-21 11:22:07 +08:00
chaijie@espressif.com
1db79146e9 fix(pmu): fix deepsleep current too big bug for esp32c61 2025-05-20 14:06:15 +08:00
chaijie@espressif.com
74c34669f0 feat(power_glich): support power_glitch of esp32c5_eco1 and above, eco32c61 eco2 and above 2025-05-20 14:06:15 +08:00
Song Ruo Jing
9ef152c220 feat(regi2c): add regi2c support for esp32h21 2025-05-19 21:46:40 +08:00
Omar Chebib
6918a45ee6 fix(esp_system): fix RTC reserved area alignment in the linker script 
Make sure the size of the RTC reserved area complies with the alignment requirement.

Closes https://github.com/espressif/esp-idf/issues/13082
 2025-05-15 16:11:19 +08:00
Gao Xu
733c0586bc Merge branch 'refactor/rng_ll_p4' into 'master' 
refactor(rng): refactor to use hal/ll apis for P4

Closes IDF-12476

See merge request espressif/esp-idf!38119
 2025-05-15 11:30:54 +08:00
Mahavir Jain
eb5d761c9d fix: secure OTA without secure boot issue for MMU page size configurable SoCs 
For secure app verification during OTA update case, the image was
getting memory mapped twice and hence the failure in verification.

Modified from memory mapped flash read to SPI flash read approach
for the MMU page size from image header.

Regression from 07318a4987

Closes https://github.com/espressif/esp-idf/issues/15936
 2025-05-13 18:09:03 +05:30
gaoxu
b691eaba6d refactor(rng): refactor to use hal/ll apis for P4 2025-05-13 09:09:06 +08:00
Laukik Hase
8a999ea19e fix(security): Set all APM masters to operate in TEE mode by default 2025-05-11 10:01:11 +05:30
Laukik Hase
41bf07e6ce refactor(esp_tee): Remove the deprecated TEE secure storage partition subtype 2025-05-04 18:03:30 +05:30
armando
755fd86b6f fix(bootloader): fixed image cannot exceed 16MB issue 
flash 32-bit-addr is an experimental feature that has multiple
dependencies, e.g. flash chip vendor, etc.

If CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH can be enabled
successfully and tests are passed, we can allow images to be
placed on higher-than-16MB flash addresses
 2025-04-29 15:42:27 +08:00
Mahavir Jain
f7724eedef Merge branch 'feature/enable_secure_boot_for_esp32h21' into 'master' 
feat: enable secure boot support for esp32h21

Closes IDF-11500 and IDF-12161

See merge request espressif/esp-idf!36618
 2025-04-28 11:37:37 +08:00
nilesh.kale
c65858287a feat: enabled secure boot support esp32h21 2025-04-25 17:48:25 +05:30
gaoxu
66bed18464 feat(rng): add regi2c control ref_count 2025-04-25 14:39:12 +08:00
gaoxu
bf335a38f7 fix(adc): fix adc do not enable/disable regi2c registers 2025-04-25 14:39:01 +08:00
Sudeep Mohanty
80910be77a fix(lp-timer): Remove LP Timer interrupt disabling from bootloader 
This commit removes the disabling of the LP Timer interrupt from the
bootloader clock configuration routine. This allows the LP Timer
interrupt to be visible to the LP Core after HP CPU boots up.

Closes https://github.com/espressif/esp-idf/issues/15751
 2025-04-16 16:31:57 +02:00
nilesh.kale
54eb749fd2 feat: updated check for chip revision and respective testcases 
This commit have updated check for max chip revision along with min chip revision.
Also added qemu based pytest to verify chip revision while performing OTA.
 2025-04-07 18:18:16 +08:00
Mahavir Jain
574d2eebd7 Merge branch 'fix/bootloader_sha_handle_memory_leak' into 'master' 
fix(bootloader_support): Fix sha handle memory leak when returning error

Closes IDF-12735

See merge request espressif/esp-idf!38058
 2025-03-27 17:05:06 +08:00
Gao Xu
3157356157 Merge branch 'refactor/rng_ll_c5' into 'master' 
refactor(rng): refactor to use hal/ll apis for c5

Closes IDF-12534

See merge request espressif/esp-idf!37601
 2025-03-27 15:31:01 +08:00
harshal.patil
4edd6c1f6d fix(bootloader_support): Fix sha handle memory leak when returning error 2025-03-27 09:18:30 +05:30
gaoxu
32b7347965 feat(rng): add comment of reserved channel in RNG 2025-03-26 14:52:59 +08:00
gaoxu
09dbbe4452 refactor(rng): refactor to use hal/ll apis for c5 2025-03-23 17:07:30 +08:00
harshal.patil
a02dec09ca refactor(bootloader_support): Unify bootloader_sha layer 2025-03-21 16:37:20 +05:30
Chen Ji Chang
6474fd67ae Merge branch 'feat/h4_introduce_step8' into 'master' 
feat(esp32h4): introduce hello world to ESP32H4 (stage8)

Closes IDF-9526 and IDF-12333

See merge request espressif/esp-idf!37545
 2025-03-20 16:16:05 +08:00
Gao Xu
728f95f498 Merge branch 'refactor/rng_ll_c6' into 'master' 
refactor(rng): refactor to use hal/ll apis for c6

Closes IDF-12533

See merge request espressif/esp-idf!37319
 2025-03-20 10:28:39 +08:00