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esp-idf/components/freertos/port/riscv/portasm.S
Marius Vikhammer 57442c38bd core: fix cases where riscv SP were not 16 byte aligned 
RISC-V stack pointer should always be 16 byte aligned, but for some cases where
we were doing manual SP manipulation this was not always the case.
2021-06-02 16:02:10 +08:00

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