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22 KiB
22 KiB
| 1 | # field_name, | efuse_block, | bit_start, | bit_count, |comment # |
|---|---|
| 2 | # | (EFUSE_BLK0 | (0..255) | (1-256) | # |
| 3 | # | EFUSE_BLK1 | | | # |
| 4 | # | ...) | | | # |
| 5 | ########################################################################## |
| 6 | # !!!!!!!!!!! # |
| 7 | # this will generate new source files, next rebuild all the sources. |
| 8 | # !!!!!!!!!!! # |
| 9 | # This file was generated by regtools.py based on the efuses.yaml file with the version: 888a61f6f500d9c7ee0aa32016b0bee7 |
| 10 | WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses |
| 11 | WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS |
| 12 | WR_DIS.DIS_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_ICACHE |
| 13 | WR_DIS.DIS_DCACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DCACHE |
| 14 | WR_DIS.DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_ICACHE |
| 15 | WR_DIS.DIS_DOWNLOAD_DCACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_DCACHE |
| 16 | WR_DIS.DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_FORCE_DOWNLOAD |
| 17 | WR_DIS.DIS_USB, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_USB |
| 18 | WR_DIS.DIS_TWAI, EFUSE_BLK0, 2, 1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI |
| 19 | WR_DIS.DIS_BOOT_REMAP, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_BOOT_REMAP |
| 20 | WR_DIS.SOFT_DIS_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of SOFT_DIS_JTAG |
| 21 | WR_DIS.HARD_DIS_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of HARD_DIS_JTAG |
| 22 | WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT |
| 23 | WR_DIS.VDD_SPI_XPD, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_XPD |
| 24 | WR_DIS.VDD_SPI_TIEH, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_TIEH |
| 25 | WR_DIS.VDD_SPI_FORCE, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_FORCE |
| 26 | WR_DIS.WDT_DELAY_SEL, EFUSE_BLK0, 3, 1, [] wr_dis of WDT_DELAY_SEL |
| 27 | WR_DIS.SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 4, 1, [] wr_dis of SPI_BOOT_CRYPT_CNT |
| 28 | WR_DIS.SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 5, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0 |
| 29 | WR_DIS.SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 6, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1 |
| 30 | WR_DIS.SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 7, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2 |
| 31 | WR_DIS.KEY_PURPOSE_0, EFUSE_BLK0, 8, 1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0 |
| 32 | WR_DIS.KEY_PURPOSE_1, EFUSE_BLK0, 9, 1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1 |
| 33 | WR_DIS.KEY_PURPOSE_2, EFUSE_BLK0, 10, 1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2 |
| 34 | WR_DIS.KEY_PURPOSE_3, EFUSE_BLK0, 11, 1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3 |
| 35 | WR_DIS.KEY_PURPOSE_4, EFUSE_BLK0, 12, 1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4 |
| 36 | WR_DIS.KEY_PURPOSE_5, EFUSE_BLK0, 13, 1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5 |
| 37 | WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, [] wr_dis of SECURE_BOOT_EN |
| 38 | WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 16, 1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE |
| 39 | WR_DIS.FLASH_TPUW, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TPUW |
| 40 | WR_DIS.DIS_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_DOWNLOAD_MODE |
| 41 | WR_DIS.DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_LEGACY_SPI_BOOT |
| 42 | WR_DIS.UART_PRINT_CHANNEL, EFUSE_BLK0, 18, 1, [] wr_dis of UART_PRINT_CHANNEL |
| 43 | WR_DIS.DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_USB_DOWNLOAD_MODE |
| 44 | WR_DIS.ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 18, 1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD |
| 45 | WR_DIS.UART_PRINT_CONTROL, EFUSE_BLK0, 18, 1, [] wr_dis of UART_PRINT_CONTROL |
| 46 | WR_DIS.PIN_POWER_SELECTION, EFUSE_BLK0, 18, 1, [] wr_dis of PIN_POWER_SELECTION |
| 47 | WR_DIS.FLASH_TYPE, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TYPE |
| 48 | WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 18, 1, [] wr_dis of FORCE_SEND_RESUME |
| 49 | WR_DIS.SECURE_VERSION, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_VERSION |
| 50 | WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1 |
| 51 | WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC |
| 52 | WR_DIS.SPI_PAD_CONFIG_CLK, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_CLK |
| 53 | WR_DIS.SPI_PAD_CONFIG_Q, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_Q |
| 54 | WR_DIS.SPI_PAD_CONFIG_D, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D |
| 55 | WR_DIS.SPI_PAD_CONFIG_CS, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_CS |
| 56 | WR_DIS.SPI_PAD_CONFIG_HD, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_HD |
| 57 | WR_DIS.SPI_PAD_CONFIG_WP, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_WP |
| 58 | WR_DIS.SPI_PAD_CONFIG_DQS, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_DQS |
| 59 | WR_DIS.SPI_PAD_CONFIG_D4, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D4 |
| 60 | WR_DIS.SPI_PAD_CONFIG_D5, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D5 |
| 61 | WR_DIS.SPI_PAD_CONFIG_D6, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D6 |
| 62 | WR_DIS.SPI_PAD_CONFIG_D7, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D7 |
| 63 | WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR |
| 64 | WR_DIS.WAFER_VERSION_MINOR_HI, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR_HI |
| 65 | WR_DIS.FLASH_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_VERSION |
| 66 | WR_DIS.BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MAJOR |
| 67 | WR_DIS.PSRAM_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_VERSION |
| 68 | WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION |
| 69 | WR_DIS.WAFER_VERSION_MINOR_LO, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR_LO |
| 70 | WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2 |
| 71 | WR_DIS.OPTIONAL_UNIQUE_ID, EFUSE_BLK0, 21, 1, [] wr_dis of OPTIONAL_UNIQUE_ID |
| 72 | WR_DIS.ADC_CALIB, EFUSE_BLK0, 21, 1, [] wr_dis of ADC_CALIB |
| 73 | WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 21, 1, [] wr_dis of BLK_VERSION_MINOR |
| 74 | WR_DIS.TEMP_CALIB, EFUSE_BLK0, 21, 1, [] wr_dis of TEMP_CALIB |
| 75 | WR_DIS.RTCCALIB_V1IDX_A10H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A10H |
| 76 | WR_DIS.RTCCALIB_V1IDX_A11H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A11H |
| 77 | WR_DIS.RTCCALIB_V1IDX_A12H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A12H |
| 78 | WR_DIS.RTCCALIB_V1IDX_A13H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A13H |
| 79 | WR_DIS.RTCCALIB_V1IDX_A20H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A20H |
| 80 | WR_DIS.RTCCALIB_V1IDX_A21H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A21H |
| 81 | WR_DIS.RTCCALIB_V1IDX_A22H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A22H |
| 82 | WR_DIS.RTCCALIB_V1IDX_A23H, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A23H |
| 83 | WR_DIS.RTCCALIB_V1IDX_A10L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A10L |
| 84 | WR_DIS.RTCCALIB_V1IDX_A11L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A11L |
| 85 | WR_DIS.RTCCALIB_V1IDX_A12L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A12L |
| 86 | WR_DIS.RTCCALIB_V1IDX_A13L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A13L |
| 87 | WR_DIS.RTCCALIB_V1IDX_A20L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A20L |
| 88 | WR_DIS.RTCCALIB_V1IDX_A21L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A21L |
| 89 | WR_DIS.RTCCALIB_V1IDX_A22L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A22L |
| 90 | WR_DIS.RTCCALIB_V1IDX_A23L, EFUSE_BLK0, 21, 1, [] wr_dis of RTCCALIB_V1IDX_A23L |
| 91 | WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA |
| 92 | WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC |
| 93 | WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0 |
| 94 | WR_DIS.BLOCK_KEY1, EFUSE_BLK0, 24, 1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1 |
| 95 | WR_DIS.BLOCK_KEY2, EFUSE_BLK0, 25, 1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2 |
| 96 | WR_DIS.BLOCK_KEY3, EFUSE_BLK0, 26, 1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3 |
| 97 | WR_DIS.BLOCK_KEY4, EFUSE_BLK0, 27, 1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4 |
| 98 | WR_DIS.BLOCK_KEY5, EFUSE_BLK0, 28, 1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5 |
| 99 | WR_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 29, 1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2 |
| 100 | WR_DIS.USB_EXCHG_PINS, EFUSE_BLK0, 30, 1, [] wr_dis of USB_EXCHG_PINS |
| 101 | WR_DIS.USB_EXT_PHY_ENABLE, EFUSE_BLK0, 30, 1, [WR_DIS.EXT_PHY_ENABLE] wr_dis of USB_EXT_PHY_ENABLE |
| 102 | WR_DIS.USB_FORCE_NOPERSIST, EFUSE_BLK0, 30, 1, [] wr_dis of USB_FORCE_NOPERSIST |
| 103 | WR_DIS.BLOCK0_VERSION, EFUSE_BLK0, 30, 1, [] wr_dis of BLOCK0_VERSION |
| 104 | RD_DIS, EFUSE_BLK0, 32, 7, [] Disable reading from BlOCK4-10 |
| 105 | RD_DIS.BLOCK_KEY0, EFUSE_BLK0, 32, 1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0 |
| 106 | RD_DIS.BLOCK_KEY1, EFUSE_BLK0, 33, 1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1 |
| 107 | RD_DIS.BLOCK_KEY2, EFUSE_BLK0, 34, 1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2 |
| 108 | RD_DIS.BLOCK_KEY3, EFUSE_BLK0, 35, 1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3 |
| 109 | RD_DIS.BLOCK_KEY4, EFUSE_BLK0, 36, 1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4 |
| 110 | RD_DIS.BLOCK_KEY5, EFUSE_BLK0, 37, 1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5 |
| 111 | RD_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 38, 1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2 |
| 112 | DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Set this bit to disable Icache |
| 113 | DIS_DCACHE, EFUSE_BLK0, 41, 1, [] Set this bit to disable Dcache |
| 114 | DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 42, 1, [] Disables Icache when SoC is in Download mode |
| 115 | DIS_DOWNLOAD_DCACHE, EFUSE_BLK0, 43, 1, [] Disables Dcache when SoC is in Download mode |
| 116 | DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Set this bit to disable the function that forces chip into download mode |
| 117 | DIS_USB, EFUSE_BLK0, 45, 1, [] Set this bit to disable USB OTG function |
| 118 | DIS_TWAI, EFUSE_BLK0, 46, 1, [DIS_CAN] Set this bit to disable the TWAI Controller function |
| 119 | DIS_BOOT_REMAP, EFUSE_BLK0, 47, 1, [] Disables capability to Remap RAM to ROM address space |
| 120 | SOFT_DIS_JTAG, EFUSE_BLK0, 49, 1, [] Software disables JTAG. When software disabled; JTAG can be activated temporarily by HMAC peripheral |
| 121 | HARD_DIS_JTAG, EFUSE_BLK0, 50, 1, [] Hardware disables JTAG permanently |
| 122 | DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 51, 1, [] Disables flash encryption when in download boot modes |
| 123 | USB_EXCHG_PINS, EFUSE_BLK0, 56, 1, [] Set this bit to exchange USB D+ and D- pins |
| 124 | USB_EXT_PHY_ENABLE, EFUSE_BLK0, 57, 1, [EXT_PHY_ENABLE] Set this bit to enable external USB PHY |
| 125 | USB_FORCE_NOPERSIST, EFUSE_BLK0, 58, 1, [] If set; forces USB BVALID to 1 |
| 126 | BLOCK0_VERSION, EFUSE_BLK0, 59, 2, [] BLOCK0 efuse version |
| 127 | VDD_SPI_XPD, EFUSE_BLK0, 68, 1, [] If VDD_SPI_FORCE is 1; this value determines if the VDD_SPI regulator is powered on |
| 128 | VDD_SPI_FORCE, EFUSE_BLK0, 70, 1, [] Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure VDD_SPI LDO |
| 129 | SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 85, 1, [] Revoke 1st secure boot key |
| 130 | SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 86, 1, [] Revoke 2nd secure boot key |
| 131 | SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 87, 1, [] Revoke 3rd secure boot key |
| 132 | KEY_PURPOSE_0, EFUSE_BLK0, 88, 4, [KEY0_PURPOSE] Purpose of KEY0 |
| 133 | KEY_PURPOSE_1, EFUSE_BLK0, 92, 4, [KEY1_PURPOSE] Purpose of KEY1 |
| 134 | KEY_PURPOSE_2, EFUSE_BLK0, 96, 4, [KEY2_PURPOSE] Purpose of KEY2 |
| 135 | KEY_PURPOSE_3, EFUSE_BLK0, 100, 4, [KEY3_PURPOSE] Purpose of KEY3 |
| 136 | KEY_PURPOSE_4, EFUSE_BLK0, 104, 4, [KEY4_PURPOSE] Purpose of KEY4 |
| 137 | KEY_PURPOSE_5, EFUSE_BLK0, 108, 4, [KEY5_PURPOSE] Purpose of KEY5 |
| 138 | SECURE_BOOT_EN, EFUSE_BLK0, 116, 1, [] Set this bit to enable secure boot |
| 139 | SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 117, 1, [] Set this bit to enable aggressive secure boot key revocation mode |
| 140 | FLASH_TPUW, EFUSE_BLK0, 124, 4, [] Configures flash startup delay after SoC power-up; in unit of (ms/2). When the value is 15; delay is 7.5 ms |
| 141 | DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, [] Set this bit to disable all download boot modes |
| 142 | DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, [] Set this bit to disable Legacy SPI boot mode |
| 143 | DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, [] Set this bit to disable use of USB OTG in UART download boot mode |
| 144 | ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, [] Set this bit to enable secure UART download mode (read/write flash only) |
| 145 | FORCE_SEND_RESUME, EFUSE_BLK0, 138, 1, [] If set; forces ROM code to send an SPI flash resume command during SPI boot |
| 146 | SECURE_VERSION, EFUSE_BLK0, 139, 16, [] Secure version (used by ESP-IDF anti-rollback feature) |
| 147 | DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 160, 1, [] Disables check of wafer version major |
| 148 | DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 161, 1, [] Disables check of blk version major |
| 149 | MAC, EFUSE_BLK1, 40, 8, [MAC_FACTORY] MAC address |
| 150 | , EFUSE_BLK1, 32, 8, [MAC_FACTORY] MAC address |
| 151 | , EFUSE_BLK1, 24, 8, [MAC_FACTORY] MAC address |
| 152 | , EFUSE_BLK1, 16, 8, [MAC_FACTORY] MAC address |
| 153 | , EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address |
| 154 | , EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address |
| 155 | SPI_PAD_CONFIG_CLK, EFUSE_BLK1, 48, 6, [] SPI_PAD_configure CLK |
| 156 | SPI_PAD_CONFIG_Q, EFUSE_BLK1, 54, 6, [] SPI_PAD_configure Q(D1) |
| 157 | SPI_PAD_CONFIG_D, EFUSE_BLK1, 60, 6, [] SPI_PAD_configure D(D0) |
| 158 | SPI_PAD_CONFIG_CS, EFUSE_BLK1, 66, 6, [] SPI_PAD_configure CS |
| 159 | SPI_PAD_CONFIG_HD, EFUSE_BLK1, 72, 6, [] SPI_PAD_configure HD(D3) |
| 160 | SPI_PAD_CONFIG_WP, EFUSE_BLK1, 78, 6, [] SPI_PAD_configure WP(D2) |
| 161 | SPI_PAD_CONFIG_DQS, EFUSE_BLK1, 84, 6, [] SPI_PAD_configure DQS |
| 162 | SPI_PAD_CONFIG_D4, EFUSE_BLK1, 90, 6, [] SPI_PAD_configure D4 |
| 163 | SPI_PAD_CONFIG_D5, EFUSE_BLK1, 96, 6, [] SPI_PAD_configure D5 |
| 164 | SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, [] SPI_PAD_configure D6 |
| 165 | SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, [] SPI_PAD_configure D7 |
| 166 | WAFER_VERSION_MAJOR, EFUSE_BLK1, 114, 2, [] WAFER_VERSION_MAJOR |
| 167 | WAFER_VERSION_MINOR_HI, EFUSE_BLK1, 116, 1, [] WAFER_VERSION_MINOR most significant bit |
| 168 | FLASH_VERSION, EFUSE_BLK1, 117, 4, [] Flash version |
| 169 | BLK_VERSION_MAJOR, EFUSE_BLK1, 121, 2, [] BLK_VERSION_MAJOR |
| 170 | PSRAM_VERSION, EFUSE_BLK1, 124, 4, [] PSRAM version |
| 171 | PKG_VERSION, EFUSE_BLK1, 128, 4, [] Package version |
| 172 | WAFER_VERSION_MINOR_LO, EFUSE_BLK1, 132, 3, [] WAFER_VERSION_MINOR least significant bits |
| 173 | OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, [] Optional unique 128-bit ID |
| 174 | ADC_CALIB, EFUSE_BLK2, 128, 4, [] 4 bit of ADC calibration |
| 175 | TEMP_CALIB, EFUSE_BLK2, 135, 9, [] Temperature calibration data |
| 176 | RTCCALIB_V1IDX_A10H, EFUSE_BLK2, 144, 8, [] |
| 177 | RTCCALIB_V1IDX_A11H, EFUSE_BLK2, 152, 8, [] |
| 178 | RTCCALIB_V1IDX_A12H, EFUSE_BLK2, 160, 8, [] |
| 179 | RTCCALIB_V1IDX_A13H, EFUSE_BLK2, 168, 8, [] |
| 180 | RTCCALIB_V1IDX_A20H, EFUSE_BLK2, 176, 8, [] |
| 181 | RTCCALIB_V1IDX_A21H, EFUSE_BLK2, 184, 8, [] |
| 182 | RTCCALIB_V1IDX_A22H, EFUSE_BLK2, 192, 8, [] |
| 183 | RTCCALIB_V1IDX_A23H, EFUSE_BLK2, 200, 8, [] |
| 184 | RTCCALIB_V1IDX_A10L, EFUSE_BLK2, 208, 6, [] |
| 185 | RTCCALIB_V1IDX_A11L, EFUSE_BLK2, 214, 6, [] |
| 186 | RTCCALIB_V1IDX_A12L, EFUSE_BLK2, 220, 6, [] |
| 187 | RTCCALIB_V1IDX_A13L, EFUSE_BLK2, 226, 6, [] |
| 188 | RTCCALIB_V1IDX_A20L, EFUSE_BLK2, 232, 6, [] |
| 189 | RTCCALIB_V1IDX_A21L, EFUSE_BLK2, 238, 6, [] |
| 190 | RTCCALIB_V1IDX_A22L, EFUSE_BLK2, 244, 6, [] |
| 191 | RTCCALIB_V1IDX_A23L, EFUSE_BLK2, 250, 6, [] |
| 192 | USER_DATA, EFUSE_BLK3, 0, 256, [BLOCK_USR_DATA] User data |
| 193 | USER_DATA.MAC_CUSTOM, EFUSE_BLK3, 200, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC |
| 194 | KEY0, EFUSE_BLK4, 0, 256, [BLOCK_KEY0] Key0 or user data |
| 195 | KEY1, EFUSE_BLK5, 0, 256, [BLOCK_KEY1] Key1 or user data |
| 196 | KEY2, EFUSE_BLK6, 0, 256, [BLOCK_KEY2] Key2 or user data |
| 197 | KEY3, EFUSE_BLK7, 0, 256, [BLOCK_KEY3] Key3 or user data |
| 198 | KEY4, EFUSE_BLK8, 0, 256, [BLOCK_KEY4] Key4 or user data |
| 199 | KEY5, EFUSE_BLK9, 0, 256, [BLOCK_KEY5] Key5 or user data |
| 200 | SYS_DATA_PART2, EFUSE_BLK10, 0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved) |