Files
esp-idf/components/riscv/include/riscv/csr_pie.h
Omar Chebib 55acc5e5e7 feat(riscv): add support for PIE coprocessor and HWLP feature
FreeRTOS tasks may now freely use the PIE coprocessor and HWLP feature.
Just like the FPU, usiing these coprocessors result in the task being pinned
to the core it is currently running on.
2024-05-20 10:47:58 +08:00

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355 B
C

/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/soc_caps.h"
#if SOC_CPU_HAS_PIE
/* CSR lowest 2 bits describe the following states:
* 00: OFF
* 01: Initial
* 10: Clean
* 11: Dirty
*/
#define CSR_PIE_STATE_REG 0x7F2
#endif /* SOC_CPU_HAS_PIE */