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https://github.com/espressif/esp-idf.git
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96 lines
2.5 KiB
C
96 lines
2.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_xt_wdt.h"
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_attr.h"
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#include "esp_intr_alloc.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#if SOC_XT_WDT_SUPPORTED
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#include "esp_private/rtc_ctrl.h"
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#include "hal/xt_wdt_hal.h"
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#include "hal/xt_wdt_ll.h"
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#include "soc/rtc.h"
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#define RTC_CLK_CAL_CYCLES 500
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const static char *TAG = "esp_xt_wdt";
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static xt_wdt_hal_context_t s_hal_ctx;
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static esp_xt_callback_t s_callback_func;
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static void *s_callback_arg;
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static portMUX_TYPE s_xt_wdt_lock = portMUX_INITIALIZER_UNLOCKED;
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static IRAM_ATTR void rtc_xt_wdt_default_isr_handler(void *arg)
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{
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ESP_EARLY_LOGE(TAG, "XTAL32K watchdog timer got triggered");
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portENTER_CRITICAL_ISR(&s_xt_wdt_lock);
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if (s_callback_func) {
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(*s_callback_func)(s_callback_arg);
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}
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portEXIT_CRITICAL_ISR(&s_xt_wdt_lock);
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}
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esp_err_t esp_xt_wdt_init(const esp_xt_wdt_config_t *cfg)
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{
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esp_err_t ret = ESP_OK;
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xt_wdt_hal_config_t hal_config = {
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.timeout = cfg->timeout,
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};
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xt_wdt_hal_init(&s_hal_ctx, &hal_config);
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if (cfg->auto_backup_clk_enable) {
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/* Estimate frequency of internal RTC oscillator */
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uint32_t rtc_clk_frequency_khz = rtc_clk_freq_cal(rtc_clk_cal(RTC_CAL_INTERNAL_OSC, RTC_CLK_CAL_CYCLES)) / 1000;
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ESP_LOGD(TAG, "Calibrating backup clock from rtc clock with frequency %"PRIu32, rtc_clk_frequency_khz);
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xt_wdt_hal_enable_backup_clk(&s_hal_ctx, rtc_clk_frequency_khz);
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}
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ESP_GOTO_ON_ERROR(rtc_isr_register(rtc_xt_wdt_default_isr_handler, NULL, XT_WDT_LL_XTAL32_DEAD_INTR_MASK, 0), err, TAG, "Failed to register isr");
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xt_wdt_hal_enable(&s_hal_ctx, 1);
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return ESP_OK;
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err:
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return ret;
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}
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void esp_xt_wdt_restore_clk(void)
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{
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xt_wdt_hal_enable(&s_hal_ctx, false);
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REG_CLR_BIT(RTC_CNTL_EXT_XTL_CONF_REG, RTC_CNTL_XPD_XTAL_32K);
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REG_SET_BIT(RTC_CNTL_EXT_XTL_CONF_REG, RTC_CNTL_XPD_XTAL_32K);
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/* Needs some time after switching to 32khz XTAL before turning on WDT again */
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esp_rom_delay_us(300);
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xt_wdt_hal_enable(&s_hal_ctx, true);
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}
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void esp_xt_wdt_register_callback(esp_xt_callback_t func, void *arg)
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{
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portENTER_CRITICAL(&s_xt_wdt_lock);
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s_callback_func = func;
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s_callback_arg = arg;
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portEXIT_CRITICAL(&s_xt_wdt_lock);
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}
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#endif //SOC_XT_WDT_SUPPORTED
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