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241 lines
31 KiB
CSV
241 lines
31 KiB
CSV
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# field_name, | efuse_block, | bit_start, | bit_count, |comment #
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# | (EFUSE_BLK0 | (0..255) | (1-256) | #
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# | EFUSE_BLK1 | | | #
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# | ...) | | | #
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##########################################################################
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# !!!!!!!!!!! #
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# After editing this file, run the command manually "idf.py efuse-common-table"
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# this will generate new source files, next rebuild all the sources.
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# !!!!!!!!!!! #
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# This file was generated by regtools.py based on the efuses.yaml file with the version: 31c7fe3f5f4e0a55b178a57126c0aca7
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WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses
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WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
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WR_DIS.KM_DISABLE_DEPLOY_MODE, EFUSE_BLK0, 1, 1, [] wr_dis of KM_DISABLE_DEPLOY_MODE
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WR_DIS.KM_RND_SWITCH_CYCLE, EFUSE_BLK0, 1, 1, [] wr_dis of KM_RND_SWITCH_CYCLE
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WR_DIS.KM_DEPLOY_ONLY_ONCE, EFUSE_BLK0, 1, 1, [] wr_dis of KM_DEPLOY_ONLY_ONCE
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WR_DIS.FORCE_USE_KEY_MANAGER_KEY, EFUSE_BLK0, 1, 1, [] wr_dis of FORCE_USE_KEY_MANAGER_KEY
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WR_DIS.FORCE_DISABLE_SW_INIT_KEY, EFUSE_BLK0, 1, 1, [] wr_dis of FORCE_DISABLE_SW_INIT_KEY
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WR_DIS.KM_XTS_KEY_LENGTH_256, EFUSE_BLK0, 1, 1, [] wr_dis of KM_XTS_KEY_LENGTH_256
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WR_DIS.LOCK_KM_KEY, EFUSE_BLK0, 1, 1, [] wr_dis of LOCK_KM_KEY
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WR_DIS.DIS_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_ICACHE
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WR_DIS.DIS_USB_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_USB_JTAG
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WR_DIS.DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_FORCE_DOWNLOAD
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WR_DIS.SPI_DOWNLOAD_MSPI_DIS, EFUSE_BLK0, 2, 1, [] wr_dis of SPI_DOWNLOAD_MSPI_DIS
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WR_DIS.DIS_TWAI, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_TWAI
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WR_DIS.JTAG_SEL_ENABLE, EFUSE_BLK0, 2, 1, [] wr_dis of JTAG_SEL_ENABLE
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WR_DIS.DIS_PAD_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_PAD_JTAG
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WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
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WR_DIS.HYS_EN_PAD, EFUSE_BLK0, 2, 1, [] wr_dis of HYS_EN_PAD
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WR_DIS.WDT_DELAY_SEL, EFUSE_BLK0, 3, 1, [] wr_dis of WDT_DELAY_SEL
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WR_DIS.SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 4, 1, [] wr_dis of SPI_BOOT_CRYPT_CNT
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WR_DIS.SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 5, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
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WR_DIS.SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 6, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
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WR_DIS.SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 7, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
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WR_DIS.KEY_PURPOSE_0, EFUSE_BLK0, 8, 1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
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WR_DIS.KEY_PURPOSE_1, EFUSE_BLK0, 9, 1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
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WR_DIS.KEY_PURPOSE_2, EFUSE_BLK0, 10, 1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
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WR_DIS.KEY_PURPOSE_3, EFUSE_BLK0, 11, 1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
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WR_DIS.KEY_PURPOSE_4, EFUSE_BLK0, 12, 1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
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WR_DIS.KEY_PURPOSE_5, EFUSE_BLK0, 13, 1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
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WR_DIS.SEC_DPA_LEVEL, EFUSE_BLK0, 14, 1, [] wr_dis of SEC_DPA_LEVEL
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WR_DIS.XTS_DPA_PSEUDO_LEVEL, EFUSE_BLK0, 14, 1, [] wr_dis of XTS_DPA_PSEUDO_LEVEL
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WR_DIS.XTS_DPA_CLK_ENABLE, EFUSE_BLK0, 14, 1, [] wr_dis of XTS_DPA_CLK_ENABLE
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WR_DIS.SECURE_BOOT_SHA384_EN, EFUSE_BLK0, 14, 1, [] wr_dis of SECURE_BOOT_SHA384_EN
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WR_DIS.ECC_FORCE_CONST_TIME, EFUSE_BLK0, 14, 1, [] wr_dis of ECC_FORCE_CONST_TIME
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WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, [] wr_dis of SECURE_BOOT_EN
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WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 16, 1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
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WR_DIS.XTAL_48M_SEL, EFUSE_BLK0, 17, 1, [] wr_dis of XTAL_48M_SEL
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WR_DIS.XTAL_48M_SEL_MODE, EFUSE_BLK0, 17, 1, [] wr_dis of XTAL_48M_SEL_MODE
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WR_DIS.FLASH_TPUW, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TPUW
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WR_DIS.DIS_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_DOWNLOAD_MODE
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WR_DIS.DIS_DIRECT_BOOT, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_DIRECT_BOOT
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WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
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WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
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WR_DIS.ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 18, 1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
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WR_DIS.UART_PRINT_CONTROL, EFUSE_BLK0, 18, 1, [] wr_dis of UART_PRINT_CONTROL
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WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 18, 1, [] wr_dis of FORCE_SEND_RESUME
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WR_DIS.SECURE_VERSION, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_VERSION
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WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
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WR_DIS.HUK_GEN_STATE, EFUSE_BLK0, 19, 1, [] wr_dis of HUK_GEN_STATE
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WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1
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WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
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WR_DIS.MAC_EXT, EFUSE_BLK0, 20, 1, [] wr_dis of MAC_EXT
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WR_DIS.WAFER_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR
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WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR
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WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
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WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
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WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR
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WR_DIS.BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MAJOR
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WR_DIS.FLASH_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_CAP
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WR_DIS.FLASH_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_VENDOR
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WR_DIS.PSRAM_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_CAP
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WR_DIS.PSRAM_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_VENDOR
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WR_DIS.TEMP, EFUSE_BLK0, 20, 1, [] wr_dis of TEMP
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WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION
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WR_DIS.PA_TRIM_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PA_TRIM_VERSION
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WR_DIS.TRIM_N_BIAS, EFUSE_BLK0, 20, 1, [] wr_dis of TRIM_N_BIAS
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WR_DIS.TRIM_P_BIAS, EFUSE_BLK0, 20, 1, [] wr_dis of TRIM_P_BIAS
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WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2
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WR_DIS.ACTIVE_HP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of ACTIVE_HP_DBIAS
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WR_DIS.ACTIVE_LP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of ACTIVE_LP_DBIAS
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WR_DIS.LSLP_HP_DBG, EFUSE_BLK0, 20, 1, [] wr_dis of LSLP_HP_DBG
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WR_DIS.LSLP_HP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of LSLP_HP_DBIAS
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WR_DIS.DSLP_LP_DBG, EFUSE_BLK0, 20, 1, [] wr_dis of DSLP_LP_DBG
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WR_DIS.DSLP_LP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of DSLP_LP_DBIAS
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WR_DIS.LP_HP_DBIAS_VOL_GAP, EFUSE_BLK0, 20, 1, [] wr_dis of LP_HP_DBIAS_VOL_GAP
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WR_DIS.REF_CURR_CODE, EFUSE_BLK0, 20, 1, [] wr_dis of REF_CURR_CODE
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WR_DIS.RES_TUNE_CODE, EFUSE_BLK0, 20, 1, [] wr_dis of RES_TUNE_CODE
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WR_DIS.OPTIONAL_UNIQUE_ID, EFUSE_BLK0, 21, 1, [] wr_dis of OPTIONAL_UNIQUE_ID
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WR_DIS.TEMPERATURE_SENSOR, EFUSE_BLK0, 21, 1, [] wr_dis of TEMPERATURE_SENSOR
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WR_DIS.OCODE, EFUSE_BLK0, 21, 1, [] wr_dis of OCODE
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WR_DIS.ADC1_AVE_INITCODE_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN0
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WR_DIS.ADC1_AVE_INITCODE_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN1
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WR_DIS.ADC1_AVE_INITCODE_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN2
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WR_DIS.ADC1_AVE_INITCODE_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN3
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WR_DIS.ADC1_HI_DOUT_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN0
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WR_DIS.ADC1_HI_DOUT_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN1
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WR_DIS.ADC1_HI_DOUT_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN2
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WR_DIS.ADC1_HI_DOUT_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN3
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WR_DIS.ADC1_CH0_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF
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WR_DIS.ADC1_CH1_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF
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WR_DIS.ADC1_CH2_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF
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WR_DIS.ADC1_CH3_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF
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WR_DIS.ADC1_CH4_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH4_ATTEN0_INITCODE_DIFF
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WR_DIS.ADC1_CH5_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH5_ATTEN0_INITCODE_DIFF
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WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
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WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
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WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
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WR_DIS.BLOCK_KEY1, EFUSE_BLK0, 24, 1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
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WR_DIS.BLOCK_KEY2, EFUSE_BLK0, 25, 1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
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WR_DIS.BLOCK_KEY3, EFUSE_BLK0, 26, 1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
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WR_DIS.BLOCK_KEY4, EFUSE_BLK0, 27, 1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
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WR_DIS.BLOCK_KEY5, EFUSE_BLK0, 28, 1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
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WR_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 29, 1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
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WR_DIS.USB_EXCHG_PINS, EFUSE_BLK0, 30, 1, [] wr_dis of USB_EXCHG_PINS
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WR_DIS.VDD_SPI_AS_GPIO, EFUSE_BLK0, 30, 1, [] wr_dis of VDD_SPI_AS_GPIO
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WR_DIS.SOFT_DIS_JTAG, EFUSE_BLK0, 31, 1, [] wr_dis of SOFT_DIS_JTAG
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RD_DIS, EFUSE_BLK0, 32, 7, [] Disable reading from BlOCK4-10
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RD_DIS.BLOCK_KEY0, EFUSE_BLK0, 32, 1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
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RD_DIS.BLOCK_KEY1, EFUSE_BLK0, 33, 1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
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RD_DIS.BLOCK_KEY2, EFUSE_BLK0, 34, 1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
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RD_DIS.BLOCK_KEY3, EFUSE_BLK0, 35, 1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
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RD_DIS.BLOCK_KEY4, EFUSE_BLK0, 36, 1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
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RD_DIS.BLOCK_KEY5, EFUSE_BLK0, 37, 1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
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RD_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 38, 1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
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BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_HI, EFUSE_BLK0, 39, 1, [] Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the high part of the field)
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DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Represents whether cache is disabled. 1: Disabled 0: Enabled
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DIS_USB_JTAG, EFUSE_BLK0, 41, 1, [] Represents whether the USB-to-JTAG function in USB Serial/JTAG is disabled. Note that \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} is available only when \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} is configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Disabled0: Enabled
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BOOTLOADER_ANTI_ROLLBACK_EN, EFUSE_BLK0, 42, 1, [] Represents whether the ani-rollback check for the 2nd stage bootloader is enabled.1: Enabled0: Disabled
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DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Represents whether the function that forces chip into Download mode is disabled. 1: Disabled0: Enabled
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SPI_DOWNLOAD_MSPI_DIS, EFUSE_BLK0, 45, 1, [] Represents whether SPI0 controller during boot\_mode\_download is disabled.0: Enabled1: Disabled
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DIS_TWAI, EFUSE_BLK0, 46, 1, [] Represents whether TWAI$^®$ function is disabled.1: Disabled0: Enabled
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JTAG_SEL_ENABLE, EFUSE_BLK0, 47, 1, [] Represents whether the selection of a JTAG signal source through the strapping pin value is enabled when all of \hyperref[fielddesc:EFUSEDISPADJTAG]{EFUSE\_DIS\_PAD\_JTAG}; \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} and \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} are configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Enabled0: Disabled
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SOFT_DIS_JTAG, EFUSE_BLK0, 48, 3, [] Represents whether PAD JTAG is disabled in the soft way. It can be restarted via HMAC. Odd count of bits with a value of 1: DisabledEven count of bits with a value of 1: Enabled
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DIS_PAD_JTAG, EFUSE_BLK0, 51, 1, [] Represents whether PAD JTAG is disabled in the hard way (permanently).1: Disabled0: Enabled
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DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 52, 1, [] Represents whether flash encryption is disabled (except in SPI boot mode).1: Disabled0: Enabled
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USB_EXCHG_PINS, EFUSE_BLK0, 57, 1, [] Represents whether the D+ and D- pins is exchanged.1: Exchanged0: Not exchanged
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VDD_SPI_AS_GPIO, EFUSE_BLK0, 58, 1, [] Represents whether VDD SPI pin is functioned as GPIO.1: Functioned0: Not functioned
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WDT_DELAY_SEL, EFUSE_BLK0, 59, 2, [] Represents RTC watchdog timeout threshold.0: The originally configured STG0 threshold × 21: The originally configured STG0 threshold × 42: The originally configured STG0 threshold × 83: The originally configured STG0 threshold × 16
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BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_LO, EFUSE_BLK0, 61, 3, [] Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the low part of the field)
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KM_DISABLE_DEPLOY_MODE, EFUSE_BLK0, 64, 4, [] Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled
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KM_RND_SWITCH_CYCLE, EFUSE_BLK0, 68, 2, [] Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles
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KM_DEPLOY_ONLY_ONCE, EFUSE_BLK0, 70, 4, [] Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once
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FORCE_USE_KEY_MANAGER_KEY, EFUSE_BLK0, 74, 4, [] Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager
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FORCE_DISABLE_SW_INIT_KEY, EFUSE_BLK0, 78, 1, [] Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable
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BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM, EFUSE_BLK0, 79, 1, [] Represents whether the ani-rollback SECURE_VERSION will be updated from the ROM bootloader.1: Enable0: Disable
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SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 80, 3, [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
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SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 83, 1, [] Revoke 1st secure boot key
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SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 84, 1, [] Revoke 2nd secure boot key
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SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 85, 1, [] Revoke 3rd secure boot key
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KEY_PURPOSE_0, EFUSE_BLK0, 86, 5, [KEY0_PURPOSE] Represents the purpose of Key0. See Table \ref{tab:efuse-key-purpose}
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KEY_PURPOSE_1, EFUSE_BLK0, 91, 5, [KEY1_PURPOSE] Represents the purpose of Key1. See Table \ref{tab:efuse-key-purpose}
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KEY_PURPOSE_2, EFUSE_BLK0, 96, 5, [KEY2_PURPOSE] Represents the purpose of Key2. See Table \ref{tab:efuse-key-purpose}
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KEY_PURPOSE_3, EFUSE_BLK0, 101, 5, [KEY3_PURPOSE] Represents the purpose of Key3. See Table \ref{tab:efuse-key-purpose}
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KEY_PURPOSE_4, EFUSE_BLK0, 106, 5, [KEY4_PURPOSE] Represents the purpose of Key4. See Table \ref{tab:efuse-key-purpose}
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KEY_PURPOSE_5, EFUSE_BLK0, 111, 5, [KEY5_PURPOSE] Represents the purpose of Key5. See Table \ref{tab:efuse-key-purpose}
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SEC_DPA_LEVEL, EFUSE_BLK0, 116, 2, [] Represents the security level of anti-DPA attack. The level is adjusted by configuring the clock random frequency division mode.0: Security level is SEC\_DPA\_OFF1: Security level is SEC\_DPA\_LOW2: Security level is SEC\_DPA\_MIDDLE3: Security level is SEC\_DPA\_HIGHFor more information; please refer to Chapter \ref{mod:sysreg} \textit{\nameref{mod:sysreg}} > Section \ref{sec:sysreg-anti-dpa-attack-security-control} \textit{\nameref{sec:sysreg-anti-dpa-attack-security-control}}.
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SECURE_BOOT_EN, EFUSE_BLK0, 121, 1, [] Represents whether Secure Boot is enabled.1: Enabled0: Disabled
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SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 122, 1, [] Represents whether aggressive revocation of Secure Boot is enabled.1: Enabled0: Disabled
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KM_XTS_KEY_LENGTH_256, EFUSE_BLK0, 123, 1, [] Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key
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FLASH_TPUW, EFUSE_BLK0, 124, 4, [] Represents the flash waiting time after power-up. Measurement unit: ms. When the value is less than 15; the waiting time is the programmed value. Otherwise; the waiting time is a fixed value; i.e. 30 ms
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DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, [] Represents whether Download mode is disable or enable. 1. Disable 0: Enable
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DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, [] Represents whether direct boot mode is disabled or enabled. 1. Disable 0: Enable
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DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1. Disable 0: Enable
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LOCK_KM_KEY, EFUSE_BLK0, 131, 1, [] Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked
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DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable
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ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, [] Represents whether security download is enabled. Only downloading into flash is supported. Reading/writing RAM or registers is not supported (i.e. stub download is not supported).1: Enabled0: Disabled
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UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enable when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3: "Disable"}
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FORCE_SEND_RESUME, EFUSE_BLK0, 136, 1, [] Represents whether ROM code is forced to send a resume command during SPI boot.1: Forced. 0: Not forced.
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SECURE_VERSION, EFUSE_BLK0, 137, 9, [] Represents the app secure version used by ESP-IDF anti-rollback feature
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SECURE_BOOT_DISABLE_FAST_WAKE, EFUSE_BLK0, 153, 1, [] Represents whether FAST VERIFY ON WAKE is disabled when Secure Boot is enabled.1: Disabled0: Enabled
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HYS_EN_PAD, EFUSE_BLK0, 154, 1, [] Represents whether the hysteresis function of PAD0 – PAD27 is enabled.1: Enabled0: Disabled
|
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XTS_DPA_PSEUDO_LEVEL, EFUSE_BLK0, 155, 2, [] Represents the pseudo round level of XTS-AES anti-DPA attack.0: Disabled1: Low2: Moderate3: High
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XTS_DPA_CLK_ENABLE, EFUSE_BLK0, 157, 1, [] Represents whether XTS-AES anti-DPA attack clock is enabled.0: Disable1: Enabled
|
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SECURE_BOOT_SHA384_EN, EFUSE_BLK0, 159, 1, [] Represents if the chip supports Secure Boot using SHA-384
|
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HUK_GEN_STATE, EFUSE_BLK0, 160, 9, [] Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid
|
||
XTAL_48M_SEL, EFUSE_BLK0, 169, 3, [] Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL\ Even number bit 1: Enable 40MHz XTAL
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XTAL_48M_SEL_MODE, EFUSE_BLK0, 172, 1, [] Represents what determines the XTAL frequency in \textbf{Joint Download Boot} mode. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.0: Strapping PAD state1: \hyperref[fielddesc:EFUSEXTAL48MSEL]{EFUSE\_XTAL\_48M\_SEL} in eFuse
|
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ECC_FORCE_CONST_TIME, EFUSE_BLK0, 173, 1, [] Represents whether to force ECC to use constant-time mode for point multiplication calculation. 0: Not force1: Force
|
||
RECOVERY_BOOTLOADER_FLASH_SECTOR, EFUSE_BLK0, 174, 9, [] Low 9 bits. Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled.
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, EFUSE_BLK0, 118, 3, [] High 3 bits. Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled.
|
||
MAC, EFUSE_BLK1, 40, 8, [MAC_FACTORY] MAC address
|
||
, EFUSE_BLK1, 32, 8, [MAC_FACTORY] MAC address
|
||
, EFUSE_BLK1, 24, 8, [MAC_FACTORY] MAC address
|
||
, EFUSE_BLK1, 16, 8, [MAC_FACTORY] MAC address
|
||
, EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address
|
||
, EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address
|
||
MAC_EXT, EFUSE_BLK1, 48, 16, [] Represents the extended bits of MAC address
|
||
WAFER_VERSION_MINOR, EFUSE_BLK1, 64, 4, [] Minor chip version
|
||
WAFER_VERSION_MAJOR, EFUSE_BLK1, 68, 2, [] Minor chip version
|
||
DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK1, 70, 1, [] Disables check of wafer version major
|
||
DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK1, 71, 1, [] Disables check of blk version major
|
||
BLK_VERSION_MINOR, EFUSE_BLK1, 72, 3, [] BLK_VERSION_MINOR of BLOCK2
|
||
BLK_VERSION_MAJOR, EFUSE_BLK1, 75, 2, [] BLK_VERSION_MAJOR of BLOCK2
|
||
FLASH_CAP, EFUSE_BLK1, 77, 3, [] Flash capacity
|
||
FLASH_VENDOR, EFUSE_BLK1, 80, 3, [] Flash vendor
|
||
PSRAM_CAP, EFUSE_BLK1, 83, 3, [] Psram capacity
|
||
PSRAM_VENDOR, EFUSE_BLK1, 86, 2, [] Psram vendor
|
||
TEMP, EFUSE_BLK1, 88, 2, [] Temp (die embedded inside)
|
||
PKG_VERSION, EFUSE_BLK1, 90, 3, [] Package version
|
||
PA_TRIM_VERSION, EFUSE_BLK1, 93, 3, [] PADC CAL PA trim version
|
||
TRIM_N_BIAS, EFUSE_BLK1, 96, 5, [] PADC CAL N bias
|
||
TRIM_P_BIAS, EFUSE_BLK1, 101, 5, [] PADC CAL P bias
|
||
ACTIVE_HP_DBIAS, EFUSE_BLK1, 106, 4, [] Active HP DBIAS of fixed voltage
|
||
ACTIVE_LP_DBIAS, EFUSE_BLK1, 110, 4, [] Active LP DBIAS of fixed voltage
|
||
LSLP_HP_DBG, EFUSE_BLK1, 114, 2, [] LSLP HP DBG of fixed voltage
|
||
LSLP_HP_DBIAS, EFUSE_BLK1, 116, 4, [] LSLP HP DBIAS of fixed voltage
|
||
DSLP_LP_DBG, EFUSE_BLK1, 120, 4, [] DSLP LP DBG of fixed voltage
|
||
DSLP_LP_DBIAS, EFUSE_BLK1, 124, 5, [] DSLP LP DBIAS of fixed voltage
|
||
LP_HP_DBIAS_VOL_GAP, EFUSE_BLK1, 129, 5, [] DBIAS gap between LP and HP
|
||
REF_CURR_CODE, EFUSE_BLK1, 134, 4, [] REF PADC Calibration Curr
|
||
RES_TUNE_CODE, EFUSE_BLK1, 138, 5, [] RES PADC Calibration Tune
|
||
OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, [] Optional unique 128-bit ID
|
||
TEMPERATURE_SENSOR, EFUSE_BLK2, 128, 9, [] Temperature calibration data
|
||
OCODE, EFUSE_BLK2, 137, 8, [] ADC OCode
|
||
ADC1_AVE_INITCODE_ATTEN0, EFUSE_BLK2, 145, 10, [] Average initcode of ADC1 atten0
|
||
ADC1_AVE_INITCODE_ATTEN1, EFUSE_BLK2, 155, 10, [] Average initcode of ADC1 atten0
|
||
ADC1_AVE_INITCODE_ATTEN2, EFUSE_BLK2, 165, 10, [] Average initcode of ADC1 atten0
|
||
ADC1_AVE_INITCODE_ATTEN3, EFUSE_BLK2, 175, 10, [] Average initcode of ADC1 atten0
|
||
ADC1_HI_DOUT_ATTEN0, EFUSE_BLK2, 185, 10, [] HI DOUT of ADC1 atten0
|
||
ADC1_HI_DOUT_ATTEN1, EFUSE_BLK2, 195, 10, [] HI DOUT of ADC1 atten1
|
||
ADC1_HI_DOUT_ATTEN2, EFUSE_BLK2, 205, 10, [] HI DOUT of ADC1 atten2
|
||
ADC1_HI_DOUT_ATTEN3, EFUSE_BLK2, 215, 10, [] HI DOUT of ADC1 atten3
|
||
ADC1_CH0_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 225, 4, [] Gap between ADC1 CH0 and average initcode
|
||
ADC1_CH1_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 229, 4, [] Gap between ADC1 CH1 and average initcode
|
||
ADC1_CH2_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 233, 4, [] Gap between ADC1 CH2 and average initcode
|
||
ADC1_CH3_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 237, 4, [] Gap between ADC1 CH3 and average initcode
|
||
ADC1_CH4_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 241, 4, [] Gap between ADC1 CH4 and average initcode
|
||
ADC1_CH5_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 245, 4, [] Gap between ADC1 CH5 and average initcode
|
||
USER_DATA, EFUSE_BLK3, 0, 256, [BLOCK_USR_DATA] User data
|
||
USER_DATA.MAC_CUSTOM, EFUSE_BLK3, 200, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
|
||
KEY0, EFUSE_BLK4, 0, 256, [BLOCK_KEY0] Key0 or user data
|
||
KEY1, EFUSE_BLK5, 0, 256, [BLOCK_KEY1] Key1 or user data
|
||
KEY2, EFUSE_BLK6, 0, 256, [BLOCK_KEY2] Key2 or user data
|
||
KEY3, EFUSE_BLK7, 0, 256, [BLOCK_KEY3] Key3 or user data
|
||
KEY4, EFUSE_BLK8, 0, 256, [BLOCK_KEY4] Key4 or user data
|
||
KEY5, EFUSE_BLK9, 0, 256, [BLOCK_KEY5] Key5 or user data
|
||
SYS_DATA_PART2, EFUSE_BLK10, 0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)
|