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refactor(gptimer): clean up SOC capabilities for GPTIMER and Timer Group

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- Remove GPTIMER and TIMG related definitions from soc_caps_full.h files
- Move timer peripheral definitions to appropriate HAL layer files
- Update references across components to use proper HAL abstractions
- Consolidate timer group and GPTIMER capabilities organization
- Ensure consistent timer configuration across all ESP32 variants

This refactoring improves the separation of concerns between SOC
capabilities and HAL implementations for timer-related functionality.
This commit is contained in:
morris
2025-09-30 18:08:23 +08:00
parent 56c3dc4755
commit e8de5b5a95
80 changed files with 357 additions and 331 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
components/esp_driver_gptimer/src/gptimer.c
View File

@@ -41,12 +41,12 @@ static esp_err_t gptimer_register_to_group(gptimer_t *timer)
{
gptimer_group_t *group = NULL;
int timer_id = -1;
for (int i = 0; i < SOC_TIMG_ATTR(INST_NUM); i++) {
for (int i = 0; i < TIMG_LL_GET(INST_NUM); i++) {
group = gptimer_acquire_group_handle(i);
ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", i);
// loop to search free timer in the group
portENTER_CRITICAL(&group->spinlock);
for (int j = 0; j < SOC_GPTIMER_ATTR(TIMERS_PER_TIMG); j++) {
for (int j = 0; j < TIMG_LL_GET(GPTIMERS_PER_INST); j++) {
if (!group->timers[j]) {
timer_id = j;
group->timers[j] = timer;

4
components/esp_driver_gptimer/src/gptimer_common.c
View File

@@ -12,8 +12,8 @@
typedef struct gptimer_platform_t {
_lock_t mutex; // platform level mutex lock
gptimer_group_t *groups[SOC_TIMG_ATTR(INST_NUM)]; // timer group pool
int group_ref_counts[SOC_TIMG_ATTR(INST_NUM)]; // reference count used to protect group install/uninstall
gptimer_group_t *groups[TIMG_LL_GET(INST_NUM)]; // timer group pool
int group_ref_counts[TIMG_LL_GET(INST_NUM)]; // reference count used to protect group install/uninstall
} gptimer_platform_t;
// gptimer driver platform, it's always a singleton

6
components/esp_driver_gptimer/src/gptimer_priv.h
View File

@@ -14,7 +14,7 @@
// Set the maximum log level for gptimer driver
#define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE
#endif
#include "soc/soc_caps_full.h"
#include "soc/soc_caps.h"
#include "freertos/FreeRTOS.h"
#include "esp_err.h"
#include "esp_log.h"
@@ -23,7 +23,7 @@
#include "esp_intr_alloc.h"
#include "esp_heap_caps.h"
#include "esp_pm.h"
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
#include "hal/timer_types.h"
#include "hal/timer_hal.h"
#include "hal/timer_ll.h"
@@ -69,7 +69,7 @@ typedef struct gptimer_t gptimer_t;
typedef struct gptimer_group_t {
int group_id;
portMUX_TYPE spinlock; // to protect per-group register level concurrent access
gptimer_t *timers[SOC_GPTIMER_ATTR(TIMERS_PER_TIMG)];
gptimer_t *timers[TIMG_LL_GET(GPTIMERS_PER_INST)];
} gptimer_group_t;
typedef enum {

108
components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer.c
View File

@@ -10,7 +10,7 @@
#include "freertos/task.h"
#include "unity.h"
#include "driver/gptimer.h"
#include "soc/soc_caps_full.h"
#include "hal/timer_periph.h"
#include "esp_attr.h"
#if CONFIG_GPTIMER_ISR_CACHE_SAFE
@@ -26,33 +26,33 @@ TEST_CASE("gptimer_set_get_raw_count", "[gptimer]")
.direction = GPTIMER_COUNT_UP,
.resolution_hz = 1 * 1000 * 1000,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&config, &timers[i]));
}
TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, gptimer_new_timer(&config, &timers[0]));
unsigned long long get_value = 0;
printf("check gptimer initial count value\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_get_raw_count(timers[i], &get_value));
TEST_ASSERT_EQUAL(0, get_value);
}
unsigned long long set_values[] = {100, 500, 666};
for (size_t j = 0; j < sizeof(set_values) / sizeof(set_values[0]); j++) {
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
printf("set raw count to %llu for gptimer %d\r\n", set_values[j], i);
TEST_ESP_OK(gptimer_set_raw_count(timers[i], set_values[j]));
}
vTaskDelay(pdMS_TO_TICKS(10));
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_get_raw_count(timers[i], &get_value));
printf("get raw count of gptimer %d: %llu\r\n", i, get_value);
TEST_ASSERT_EQUAL(set_values[j], get_value);
}
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}
}
@@ -60,7 +60,7 @@ TEST_CASE("gptimer_set_get_raw_count", "[gptimer]")
TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]")
{
gptimer_clock_source_t test_clk_srcs[] = SOC_GPTIMER_CLKS;
uint32_t timer_resolution_hz[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
uint32_t timer_resolution_hz[TIMER_LL_GPTIMERS_TOTAL];
// test with various clock sources
for (size_t i = 0; i < sizeof(test_clk_srcs) / sizeof(test_clk_srcs[0]); i++) {
@@ -69,36 +69,36 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]")
.direction = GPTIMER_COUNT_UP,
.resolution_hz = 1 * 1000 * 1000,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i]));
TEST_ESP_OK(gptimer_get_resolution(timers[i], &timer_resolution_hz[i]));
}
// start timer before enable should fail
TEST_ESP_ERR(ESP_ERR_INVALID_STATE, gptimer_start(timers[0]));
printf("enable timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_enable(timers[i]));
}
printf("start timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_start(timers[i]));
}
esp_rom_delay_us(20 * 1000); // 20ms = 20_000 ticks
uint64_t value = 0;
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value));
// convert the raw count to us
value = value * 1000000 / timer_resolution_hz[i];
TEST_ASSERT_UINT_WITHIN(200, 20000, value);
}
printf("stop timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_stop(timers[i]));
}
printf("check whether timers have stopped\r\n");
esp_rom_delay_us(20 * 1000);
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value));
printf("get raw count of gptimer %d: %llu\r\n", i, value);
// convert the raw count to us
@@ -106,17 +106,17 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]")
TEST_ASSERT_UINT_WITHIN(400, 20000, value); //200 more threshold for cpu on stop process
}
printf("restart timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_start(timers[i]));
}
esp_rom_delay_us(20 * 1000);
printf("stop timers again\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_stop(timers[i]));
}
printf("check whether timers have stopped\r\n");
esp_rom_delay_us(20 * 1000);
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value));
printf("get raw count of gptimer %d: %llu\r\n", i, value);
// convert the raw count to us
@@ -124,11 +124,11 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]")
TEST_ASSERT_UINT_WITHIN(600, 40000, value); //same 200 for cpu time
}
printf("disable timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_disable(timers[i]));
}
printf("delete timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}
}
@@ -163,8 +163,8 @@ TEST_CASE("gptimer_stop_on_alarm", "[gptimer]")
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i]));
}
@@ -174,7 +174,7 @@ TEST_CASE("gptimer_stop_on_alarm", "[gptimer]")
gptimer_alarm_config_t alarm_config = {};
printf("start timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
alarm_config.alarm_count = 100000 * (i + 1);
TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config));
TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle));
@@ -182,38 +182,38 @@ TEST_CASE("gptimer_stop_on_alarm", "[gptimer]")
TEST_ESP_OK(gptimer_start(timers[i]));
printf("alarm value for gptimer %d: %llu\r\n", i, alarm_config.alarm_count);
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000)));
}
printf("check whether the timers have stopped in the ISR\r\n");
vTaskDelay(pdMS_TO_TICKS(20));
unsigned long long value = 0;
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value));
printf("get raw count of gptimer %d: %llu\r\n", i, value);
TEST_ASSERT_UINT_WITHIN(GPTIMER_STOP_ON_ALARM_COUNT_DELTA, 100000 * (i + 1), value);
}
printf("restart timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
alarm_config.alarm_count = 100000 * (i + 1);
// reset counter value to zero
TEST_ESP_OK(gptimer_set_raw_count(timers[i], 0));
TEST_ESP_OK(gptimer_start(timers[i]));
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000)));
}
printf("check whether the timers have stopped in the ISR\r\n");
vTaskDelay(pdMS_TO_TICKS(20));
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value));
printf("get raw count of gptimer %d: %llu\r\n", i, value);
TEST_ASSERT_UINT_WITHIN(GPTIMER_STOP_ON_ALARM_COUNT_DELTA, 100000 * (i + 1), value);
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_disable(timers[i]));
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}
@@ -249,8 +249,8 @@ TEST_CASE("gptimer_auto_reload_on_alarm", "[gptimer]")
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i]));
}
@@ -264,7 +264,7 @@ TEST_CASE("gptimer_auto_reload_on_alarm", "[gptimer]")
};
printf("start timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config));
TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle));
TEST_ESP_OK(gptimer_enable(timers[i]));
@@ -277,7 +277,7 @@ TEST_CASE("gptimer_auto_reload_on_alarm", "[gptimer]")
TEST_ESP_OK(gptimer_stop(timers[i]));
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_disable(timers[i]));
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}
@@ -313,8 +313,8 @@ TEST_CASE("gptimer_one_shot_alarm", "[gptimer]")
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
timer_config.intr_priority = i % 3 + 1; // test different priorities
TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i]));
}
@@ -328,7 +328,7 @@ TEST_CASE("gptimer_one_shot_alarm", "[gptimer]")
};
printf("start timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config));
TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle));
TEST_ESP_OK(gptimer_enable(timers[i]));
@@ -344,14 +344,14 @@ TEST_CASE("gptimer_one_shot_alarm", "[gptimer]")
}
printf("restart timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_start(timers[i]));
// alarm should be triggered immediately as the counter value has across the target alarm value already
TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, 0));
TEST_ESP_OK(gptimer_stop(timers[i]));
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_disable(timers[i]));
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}
@@ -379,8 +379,8 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]")
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i]));
}
@@ -391,7 +391,7 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]")
.alarm_count = 100000, // initial alarm count, 100ms
};
printf("start timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config));
TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle));
TEST_ESP_OK(gptimer_enable(timers[i]));
@@ -406,7 +406,7 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]")
}
printf("restart timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_start(timers[i]));
// check the alarm event for multiple times
TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(500)));
@@ -417,7 +417,7 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]")
TEST_ASSERT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(500)));
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_disable(timers[i]));
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}
@@ -453,8 +453,8 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]")
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_DOWN,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i]));
TEST_ESP_OK(gptimer_set_raw_count(timers[i], 200000));
}
@@ -468,7 +468,7 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]")
.flags.auto_reload_on_alarm = true,
};
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config));
TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle));
TEST_ESP_OK(gptimer_enable(timers[i]));
@@ -480,7 +480,7 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]")
}
printf("restart gptimer with previous configuration\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_start(timers[i]));
// check twice, as it's a period event
TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000)));
@@ -488,7 +488,7 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]")
TEST_ESP_OK(gptimer_stop(timers[i]));
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_disable(timers[i]));
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}
@@ -513,14 +513,14 @@ TEST_CASE("gptimer_overflow", "[gptimer]")
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
};
gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
gptimer_handle_t timers[TIMER_LL_GPTIMERS_TOTAL];
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i]));
}
#if SOC_MODULE_ATTR(GPTIMER, COUNTER_BIT_WIDTH) == 64
#if TIMER_LL_COUNTER_BIT_WIDTH == 64
uint64_t reload_at = UINT64_MAX - 100000;
#else
uint64_t reload_at = (1ULL << SOC_MODULE_ATTR(GPTIMER, COUNTER_BIT_WIDTH)) - 100000;
uint64_t reload_at = (1ULL << TIMER_LL_COUNTER_BIT_WIDTH) - 100000;
#endif
gptimer_event_callbacks_t cbs = {
.on_alarm = test_gptimer_overflow_reload_callback,
@@ -533,7 +533,7 @@ TEST_CASE("gptimer_overflow", "[gptimer]")
// The counter should start from [COUNTER_MAX-100000] and overflows to [0] and continue, then reached to alarm value [100000], reloaded to [COUNTER_MAX-100000] automatically
// thus the period should be 200ms
printf("start timers\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config));
TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle));
// we start from the reload value
@@ -544,7 +544,7 @@ TEST_CASE("gptimer_overflow", "[gptimer]")
TEST_ESP_OK(gptimer_stop(timers[i]));
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_disable(timers[i]));
TEST_ESP_OK(gptimer_del_timer(timers[i]));
}

2
components/esp_gdbstub/CMakeLists.txt
View File

@@ -28,4 +28,4 @@ idf_component_register(SRCS ${srcs}
PRIV_INCLUDE_DIRS ${priv_includes}
LDFRAGMENTS "linker.lf"
REQUIRES "freertos"
PRIV_REQUIRES "soc" "esp_rom" "esp_system")
PRIV_REQUIRES esp_hal_wdt)

32
components/esp_gdbstub/src/gdbstub.c
View File

@@ -5,24 +5,22 @@
*/
#include <string.h>
#include "sys/reent.h"
#include <sys/param.h>
#include <sys/reent.h>
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_gdbstub.h"
#include "esp_gdbstub_common.h"
#include "esp_gdbstub_memory_regions.h"
#include "sdkconfig.h"
#include <sys/param.h>
#include "soc/soc_caps.h"
#include "soc/uart_reg.h"
#include "soc/periph_defs.h"
#include "esp_attr.h"
#include "esp_cpu.h"
#include "esp_log.h"
#include "esp_intr_alloc.h"
#include "soc/soc_caps.h"
#include "soc/interrupts.h"
#include "hal/wdt_hal.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "sdkconfig.h"
#if GDBSTUB_QXFER_FEATURES_ENABLED
#define GDBSTUB_QXFER_SUPPORTED_STR ";qXfer:features:read+"
@@ -124,10 +122,10 @@ static wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT();
static bool rtc_wdt_ctx_enabled = false;
static wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
static bool wdt0_context_enabled = false;
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
static wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
static bool wdt1_context_enabled = false;
#endif // SOC_MODULE_ATTR(TIMG, INST_NUM)
#endif // TIMG_LL_GET(INST_NUM)
/**
* Disable all enabled WDTs
@@ -135,7 +133,7 @@ static bool wdt1_context_enabled = false;
static inline void disable_all_wdts(void)
{
wdt0_context_enabled = wdt_hal_is_enabled(&wdt0_context);
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
wdt1_context_enabled = wdt_hal_is_enabled(&wdt1_context);
#endif
rtc_wdt_ctx_enabled = wdt_hal_is_enabled(&rtc_wdt_ctx);
@@ -148,7 +146,7 @@ static inline void disable_all_wdts(void)
wdt_hal_write_protect_enable(&wdt0_context);
}
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
/* Interrupt WDT is the Main Watchdog Timer of Timer Group 1 */
if (true == wdt1_context_enabled) {
wdt_hal_write_protect_disable(&wdt1_context);
@@ -156,7 +154,7 @@ static inline void disable_all_wdts(void)
wdt_hal_feed(&wdt1_context);
wdt_hal_write_protect_enable(&wdt1_context);
}
#endif // SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#endif // TIMG_LL_GET(INST_NUM) >= 2
if (true == rtc_wdt_ctx_enabled) {
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
@@ -177,14 +175,14 @@ static inline void enable_all_wdts(void)
wdt_hal_enable(&wdt0_context);
wdt_hal_write_protect_enable(&wdt0_context);
}
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
/* Interrupt WDT is the Main Watchdog Timer of Timer Group 1 */
if (false == wdt1_context_enabled) {
wdt_hal_write_protect_disable(&wdt1_context);
wdt_hal_enable(&wdt1_context);
wdt_hal_write_protect_enable(&wdt1_context);
}
#endif // SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#endif // TIMG_LL_GET(INST_NUM) >= 2
if (false == rtc_wdt_ctx_enabled) {
wdt_hal_write_protect_disable(&rtc_wdt_ctx);

7
components/esp_hal_timg/README.md
View File

@@ -1,6 +1,7 @@
# ESP Hardware Abstraction Layer for Timer Groups (`esp_hal_timg`)
# ESP Hardware Abstraction Layer for Timer Group Peripheral
⚠️ **Notice**: This HAL component is under active development. API stability and backward-compatibility between versions are not guaranteed at this time.
> [!NOTE]
> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
## Overview
@@ -11,7 +12,7 @@ The `esp_hal_timg` component provides a **Hardware Abstraction Layer** for the G
The HAL architecture consists of two primary layers:
1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with timer peripherals, including:
- Initialization and deinitialization
- Initialization and de-initialization
- Timer control operations (start, stop, reload)
- Alarm and event handling
- Counter operations

6
components/esp_hal_timg/esp32/include/hal/lact_ll.h
View File

@@ -13,13 +13,13 @@
#include "soc/timer_group_struct.h"
#include "soc/dport_reg.h"
// Get timer group register base address with giving group number
#define LACT_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
#ifdef __cplusplus
extern "C" {
#endif
// Get timer group register base address with giving group number
#define LACT_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
/**
* @brief Set clock prescale for LACT timer
*

12
components/esp_hal_timg/esp32/include/hal/timer_ll.h
View File

@@ -15,19 +15,25 @@
#include "soc/timer_group_struct.h"
#include "soc/dport_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 64
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support APB as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Set clock source for timer
*

8
components/esp_hal_timg/esp32/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/dport_reg.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 2
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = {
[0] = {

14
components/esp_hal_timg/esp32c2/include/hal/timer_ll.h
View File

@@ -14,14 +14,22 @@
#include "soc/timer_group_struct.h"
#include "soc/system_struct.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) (&TIMERG0)
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Set clock source for timer
*

8
components/esp_hal_timg/esp32c2/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/system_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 1
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32c2/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[1][1] = {
[0] = {

12
components/esp_hal_timg/esp32c3/include/hal/timer_ll.h
View File

@@ -14,19 +14,25 @@
#include "soc/timer_group_struct.h"
#include "soc/system_struct.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support APB as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Set clock source for timer
*

8
components/esp_hal_timg/esp32c3/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/system_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32c3/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = {
[0] = {

12
components/esp_hal_timg/esp32c5/include/hal/timer_ll.h
View File

@@ -15,19 +15,25 @@
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support RC_FAST as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \
(uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \
[GPTIMER_ETM_TASK_START_COUNT] = TG0_TASK_CNT_START_TIMER0, \

8
components/esp_hal_timg/esp32c5/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/pcr_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32c5/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = {
[0] = {

13
components/esp_hal_timg/esp32c6/include/hal/timer_ll.h
View File

@@ -15,19 +15,24 @@
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support RC_FAST as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \
(uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \
[GPTIMER_ETM_TASK_START_COUNT] = TIMER0_TASK_CNT_START_TIMER0, \

8
components/esp_hal_timg/esp32c6/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/pcr_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32c6/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = {
[0] = {

12
components/esp_hal_timg/esp32c61/include/hal/timer_ll.h
View File

@@ -15,19 +15,25 @@
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support RC_FAST as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \
(uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \
[GPTIMER_ETM_TASK_START_COUNT] = TG0_TASK_CNT_START_TIMER0, \

8
components/esp_hal_timg/esp32c61/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/pcr_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32c61/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = {
[0] = {

16
components/esp_hal_timg/esp32h2/include/hal/timer_ll.h
View File

@@ -15,14 +15,22 @@
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
// Get timer group register base address with giving group number
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
#ifdef __cplusplus
extern "C" {
#endif
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \
(uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \
[GPTIMER_ETM_TASK_START_COUNT] = TIMER0_TASK_CNT_START_TIMER0, \

8
components/esp_hal_timg/esp32h2/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/pcr_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32h2/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = {
[0] = {

14
components/esp_hal_timg/esp32h21/include/hal/timer_ll.h
View File

@@ -15,19 +15,25 @@
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
#ifdef __cplusplus
extern "C" {
#endif
// Get timer group register base address with giving group number
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support RC_FAST as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \
(uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \
[GPTIMER_ETM_TASK_START_COUNT] = TIMER0_TASK_CNT_START_TIMER0, \

8
components/esp_hal_timg/esp32h21/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/pcr_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32h21/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = {
[0] = {

14
components/esp_hal_timg/esp32h4/include/hal/timer_ll.h
View File

@@ -15,19 +15,25 @@
#include "soc/pcr_struct.h"
#include "soc/soc_etm_source.h"
#ifdef __cplusplus
extern "C" {
#endif
// Get timer group register base address with giving group number
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support RC_FAST as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \
(uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \
[GPTIMER_ETM_TASK_START_COUNT] = TG0_TASK_CNT_START_TIMER0, \

8
components/esp_hal_timg/esp32h4/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/pcr_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 1
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32h4/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = {
[0] = {

14
components/esp_hal_timg/esp32p4/include/hal/timer_ll.h
View File

@@ -15,19 +15,25 @@
#include "soc/soc_etm_source.h"
#include "soc/hp_sys_clkrst_struct.h"
#ifdef __cplusplus
extern "C" {
#endif
// Get timer group register base address with giving group number
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support RC_FAST as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \
(uint32_t[2][2][GPTIMER_ETM_TASK_MAX]){ \
{ \

8
components/esp_hal_timg/esp32p4/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/hp_sys_clkrst_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 2
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32p4/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = {
[0] = {

12
components/esp_hal_timg/esp32s2/include/hal/timer_ll.h
View File

@@ -14,19 +14,25 @@
#include "soc/timer_group_struct.h"
#include "soc/system_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 64
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support APB as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Set clock source for timer
*

8
components/esp_hal_timg/esp32s2/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/system_reg.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 2
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32s2/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = {
[0] = {

12
components/esp_hal_timg/esp32s3/include/hal/timer_ll.h
View File

@@ -14,19 +14,25 @@
#include "soc/timer_group_struct.h"
#include "soc/system_struct.h"
#ifdef __cplusplus
extern "C" {
#endif
// Total number of general purpose timers
#define TIMER_LL_GPTIMERS_TOTAL (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
// Get timer group register base address with giving group number
#define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
// Bit width of GPTIMER counter
#define TIMER_LL_COUNTER_BIT_WIDTH 54
// Get alarm interrupt mask with the given timer ID
#define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
// Support APB as function clock
#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Set clock source for timer
*

8
components/esp_hal_timg/esp32s3/include/hal/timg_ll.h
View File

@@ -14,6 +14,14 @@
#include "soc/timer_group_struct.h"
#include "soc/system_struct.h"
#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
// Number of Timer Group instances
#define TIMG_LL_INST_NUM 2
// Number of general purpose timers in each Timer Group
#define TIMG_LL_GPTIMERS_PER_INST 2
#ifdef __cplusplus
extern "C" {
#endif

2
components/esp_hal_timg/esp32s3/timer_periph.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = {
[0] = {

9
components/esp_hal_timg/include/soc/timer_periph.h → components/esp_hal_timg/include/hal/timer_periph.h
View File

@@ -13,15 +13,12 @@
#include "soc/soc_caps_full.h"
#include "soc/periph_defs.h"
#include "soc/regdma.h"
#include "hal/timer_ll.h"
#if SOC_HAS(PAU)
#include "soc/retention_periph_defs.h"
#endif // SOC_HAS(PAU)
// helper macros to access module attributes
#define SOC_TIMG_ATTR(_attr) SOC_MODULE_ATTR(TIMG, _attr)
#define SOC_GPTIMER_ATTR(_attr) SOC_MODULE_ATTR(GPTIMER, _attr)
#ifdef __cplusplus
extern "C" {
#endif
@@ -32,7 +29,7 @@ typedef struct {
const int irq_id; // interrupt source ID
} soc_timg_gptimer_signal_desc_t;
extern const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[SOC_TIMG_ATTR(INST_NUM)][SOC_GPTIMER_ATTR(TIMERS_PER_TIMG)];
extern const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[TIMG_LL_GET(INST_NUM)][TIMG_LL_GET(GPTIMERS_PER_INST)];
#if SOC_HAS(PAU)
typedef struct {
@@ -41,7 +38,7 @@ typedef struct {
const size_t array_size; // Size of the regdma_entry_array
} soc_timg_gptimer_retention_desc_t;
extern const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[SOC_TIMG_ATTR(INST_NUM)][SOC_GPTIMER_ATTR(TIMERS_PER_TIMG)];
extern const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[TIMG_LL_GET(INST_NUM)][TIMG_LL_GET(GPTIMERS_PER_INST)];
#endif // SOC_HAS(PAU)
#ifdef __cplusplus

2
components/esp_hal_wdt/include/hal/mwdt_periph.h
View File

@@ -27,7 +27,7 @@ typedef struct {
uint32_t link_num;
} tg_reg_ctx_link_t;
extern const tg_reg_ctx_link_t tg_wdt_regs_retention[TIMG_LL_INST_NUM];
extern const tg_reg_ctx_link_t tg_wdt_regs_retention[TIMG_LL_GET(INST_NUM)];
#endif // SOC_MWDT_SUPPORT_SLEEP_RETENTION
#ifdef __cplusplus

6
components/esp_hal_wdt/rom_patch.c
View File

@@ -7,10 +7,8 @@
#include <stddef.h>
#include "soc/soc_caps.h"
#include "esp_rom_caps.h"
#include "hal/wdt_types.h"
#include "hal/mwdt_periph.h"
#include "hal/wdt_hal.h"
#include "hal/mwdt_ll.h"
#if ESP_ROM_WDT_INIT_PATCH
void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
@@ -20,7 +18,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
if (wdt_inst == WDT_MWDT0) {
hal->mwdt_dev = &TIMERG0;
}
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
else if (wdt_inst == WDT_MWDT1) {
hal->mwdt_dev = &TIMERG1;
}

2
components/esp_hal_wdt/wdt_hal_iram.c
View File

@@ -19,7 +19,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
if (wdt_inst == WDT_MWDT0) {
hal->mwdt_dev = &TIMERG0;
}
#if TIMG_LL_INST_NUM >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
else if (wdt_inst == WDT_MWDT1) {
hal->mwdt_dev = &TIMERG1;
}

2
components/esp_hw_support/CMakeLists.txt
View File

@@ -11,7 +11,7 @@ endif()
set(requires soc)
# only esp_hw_support/adc_share_hw_ctrl.c requires efuse component
set(priv_requires efuse spi_flash bootloader_support esp_hal_timg)
set(priv_requires efuse spi_flash bootloader_support esp_hal_wdt)
if(${target} STREQUAL "esp32c6")
list(APPEND priv_requires hal)

1
components/esp_hw_support/port/esp32/rtc_sleep.c
View File

@@ -9,7 +9,6 @@
#include "soc/rtc.h"
#include "soc/dport_reg.h"
#include "soc/i2s_periph.h"
#include "soc/timer_periph.h"
#include "soc/bb_reg.h"
#include "soc/nrx_reg.h"
#include "soc/fe_reg.h"

2
components/esp_hw_support/port/esp32/rtc_time.c
View File

@@ -10,7 +10,7 @@
#include "hal/rtc_cntl_ll.h"
#include "hal/timg_ll.h"
#include "soc/rtc.h"
#include "soc/timer_periph.h"
#include "hal/timer_periph.h"
#include "esp_hw_log.h"
#include "esp_private/periph_ctrl.h"

4
components/esp_hw_support/sleep_modes.c
View File

@@ -576,7 +576,7 @@ static SLEEP_FN_ATTR void suspend_timers(uint32_t sleep_flags) {
if (!(sleep_flags & RTC_SLEEP_PD_XTAL)) {
#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
/* If timegroup implemented task watchdog or interrupt watchdog is running, we have to stop it. */
for (uint32_t tg_num = 0; tg_num < SOC_MODULE_ATTR(TIMG, INST_NUM); ++tg_num) {
for (uint32_t tg_num = 0; tg_num < TIMG_LL_GET(INST_NUM); ++tg_num) {
if (mwdt_ll_check_if_enabled(TIMER_LL_GET_HW(tg_num))) {
mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num));
mwdt_ll_disable(TIMER_LL_GET_HW(tg_num));
@@ -602,7 +602,7 @@ static SLEEP_FN_ATTR void resume_timers(uint32_t sleep_flags) {
}
#endif
#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
for (uint32_t tg_num = 0; tg_num < SOC_MODULE_ATTR(TIMG, INST_NUM); ++tg_num) {
for (uint32_t tg_num = 0; tg_num < TIMG_LL_GET(INST_NUM); ++tg_num) {
if (s_stopped_tgwdt_bmap & BIT(tg_num)) {
mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num));
mwdt_ll_enable(TIMER_LL_GET_HW(tg_num));

4
components/esp_hw_support/sleep_system_peripheral.c
View File

@@ -11,7 +11,7 @@
#include "soc/soc_caps_full.h"
#include "soc/system_periph_retention.h"
#include "soc/uart_periph.h"
#include "soc/timer_periph.h"
#include "hal/timer_ll.h"
#include "esp_sleep.h"
#include "esp_log.h"
@@ -189,7 +189,7 @@ bool peripheral_domain_pd_allowed(void)
#if SOC_TIMER_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_TG0_TIMER0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG0_TIMER0 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_TG1_TIMER0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG1_TIMER0 % 32);
#if SOC_GPTIMER_ATTR(TIMERS_PER_TIMG) > 1
#if TIMG_LL_GET(GPTIMERS_PER_INST) > 1
mask.bitmap[SLEEP_RETENTION_MODULE_TG0_TIMER1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG0_TIMER1 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_TG1_TIMER1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG1_TIMER1 % 32);
#endif

34
components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_intr_alloc.c
View File

@@ -18,7 +18,7 @@
#include "unity.h"
#include "esp_intr_alloc.h"
#include "driver/gptimer.h"
#include "soc/soc_caps_full.h"
#include "hal/timer_periph.h"
#include "soc/system_intr.h"
#if SOC_GPSPI_SUPPORTED
#include "soc/spi_periph.h"
@@ -38,9 +38,9 @@ static bool on_timer_alarm(gptimer_handle_t timer, const gptimer_alarm_event_dat
static void timer_test(int flags)
{
static int count[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)] = {0};
gptimer_handle_t gptimers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
intr_handle_t inth[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)];
static int count[TIMER_LL_GPTIMERS_TOTAL] = {0};
gptimer_handle_t gptimers[TIMER_LL_GPTIMERS_TOTAL];
intr_handle_t inth[TIMER_LL_GPTIMERS_TOTAL];
gptimer_config_t config = {
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
@@ -48,7 +48,7 @@ static void timer_test(int flags)
.resolution_hz = 1000000,
.flags.intr_shared = (flags & ESP_INTR_FLAG_SHARED) == ESP_INTR_FLAG_SHARED,
};
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_new_timer(&config, &gptimers[i]));
}
gptimer_alarm_config_t alarm_config = {
@@ -60,7 +60,7 @@ static void timer_test(int flags)
.on_alarm = on_timer_alarm,
};
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_register_event_callbacks(gptimers[i], &cbs, &count[i]));
alarm_config.alarm_count += 10000 * i;
TEST_ESP_OK(gptimer_set_alarm_action(gptimers[i], &alarm_config));
@@ -73,39 +73,39 @@ static void timer_test(int flags)
if ((flags & ESP_INTR_FLAG_SHARED)) {
/* Check that the allocated interrupts are actually shared */
int intr_num = esp_intr_get_intno(inth[0]);
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ASSERT_EQUAL(intr_num, esp_intr_get_intno(inth[i]));
}
}
vTaskDelay(1000 / portTICK_PERIOD_MS);
printf("Timer values after 1 sec:");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
printf(" %d", count[i]);
}
printf("\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ASSERT_NOT_EQUAL(0, count[i]);
}
printf("Disabling timers' interrupt...\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
esp_intr_disable(inth[i]);
count[i] = 0;
}
vTaskDelay(1000 / portTICK_PERIOD_MS);
printf("Timer values after 1 sec:");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
printf(" %d", count[i]);
}
printf("\r\n");
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ASSERT_EQUAL(0, count[i]);
}
for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) {
for (int i = 0; i < TIMER_LL_GPTIMERS_TOTAL; i++) {
TEST_ESP_OK(gptimer_stop(gptimers[i]));
TEST_ESP_OK(gptimer_disable(gptimers[i]));
TEST_ESP_OK(gptimer_del_timer(gptimers[i]));
@@ -256,7 +256,7 @@ void IRAM_ATTR int_handler1(void *arg)
{
intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
esp_rom_printf("handler 1 called.\n");
if ( ctx->flag1 ) {
if (ctx->flag1) {
ctx->flag3 = true;
} else {
ctx->flag1 = true;
@@ -273,7 +273,7 @@ void IRAM_ATTR int_handler2(void *arg)
{
intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
esp_rom_printf("handler 2 called.\n");
if ( ctx->flag2 ) {
if (ctx->flag2) {
ctx->flag4 = true;
} else {
ctx->flag2 = true;
@@ -321,7 +321,7 @@ TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[in
#endif
vTaskDelay(100);
TEST_ASSERT( ctx.flag1 && ctx.flag2 );
TEST_ASSERT(ctx.flag1 && ctx.flag2);
printf("remove intr 1.\n");
r = esp_intr_free(handle2);
@@ -335,7 +335,7 @@ TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[in
#endif
vTaskDelay(500);
TEST_ASSERT( ctx.flag3 && !ctx.flag4 );
TEST_ASSERT(ctx.flag3 && !ctx.flag4);
printf("test passed.\n");
esp_intr_free(handle1);
}

2
components/esp_system/CMakeLists.txt
View File

@@ -80,7 +80,7 @@ else()
# [REFACTOR-TODO] Provide system hook to release dependency reversion.
# IDF-13980
esp_hal_i2c
esp_hal_timg # task_wdt_impl_timergroup.c relies on it
esp_hal_wdt
LDFRAGMENTS "linker.lf" "app.lf")
add_subdirectory(port)

7
components/esp_system/int_wdt.c
View File

@@ -9,9 +9,8 @@
#include <stdbool.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#include "hal/mwdt_periph.h"
#include "hal/wdt_hal.h"
#include "hal/mwdt_ll.h"
#include "hal/timg_ll.h"
#include "soc/system_intr.h"
#include "freertos/FreeRTOS.h"
#include "esp_cpu.h"
@@ -29,7 +28,7 @@
#include "esp_private/sleep_retention.h"
#endif
#if SOC_MODULE_ATTR(TIMG, INST_NUM) > 1
#if TIMG_LL_GET(INST_NUM) > 1
/* If we have two hardware timer groups, use the second one for interrupt watchdog. */
#define WDT_LEVEL_INTR_SOURCE SYS_TG1_WDT_INTR_SOURCE
@@ -50,7 +49,7 @@
#define IWDT_PERIPH PERIPH_TIMG0_MODULE
#define IWDT_TIMER_GROUP 0
#endif // SOC_MODULE_ATTR(TIMG, INST_NUM) > 1
#endif // TIMG_LL_GET(INST_NUM) > 1
#if CONFIG_ESP_INT_WDT
#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION

9
components/esp_system/panic.c
View File

@@ -18,7 +18,6 @@
#include "hal/timer_hal.h"
#include "hal/wdt_types.h"
#include "hal/wdt_hal.h"
#include "hal/mwdt_ll.h"
#include "esp_private/esp_int_wdt.h"
#include "esp_private/panic_internal.h"
@@ -195,12 +194,12 @@ void esp_panic_handler_disable_timg_wdts(void)
wdt_hal_disable(&wdt0_context);
wdt_hal_write_protect_enable(&wdt0_context);
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
wdt_hal_write_protect_disable(&wdt1_context);
wdt_hal_disable(&wdt1_context);
wdt_hal_write_protect_enable(&wdt1_context);
#endif /* SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 */
#endif /* TIMG_LL_GET(INST_NUM) >= 2 */
}
/* This function enables the RTC WDT with the given timeout in milliseconds */
@@ -235,7 +234,7 @@ void esp_panic_handler_feed_wdts(void)
wdt_hal_write_protect_enable(&wdt0_context);
}
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
// Feed Timer Group 1 WDT
wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
if (wdt_hal_is_enabled(&wdt1_context)) {
@@ -243,7 +242,7 @@ void esp_panic_handler_feed_wdts(void)
wdt_hal_feed(&wdt1_context);
wdt_hal_write_protect_enable(&wdt1_context);
}
#endif /* SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 */
#endif /* TIMG_LL_GET(INST_NUM) >= 2 */
// Feed RTC WDT
if (wdt_hal_is_enabled(&rtc_wdt_ctx)) {

1
components/esp_system/port/arch/riscv/panic_arch.c
View File

@@ -12,7 +12,6 @@
#include "riscv/rvruntime-frames.h"
#include "riscv/rv_utils.h"
#include "esp_private/cache_err_int.h"
#include "soc/timer_periph.h"
#if CONFIG_ESP_SYSTEM_MEMPROT && CONFIG_ESP_SYSTEM_MEMPROT_PMS
#include "esp_private/esp_memprot_internal.h"

1
components/esp_system/port/soc/esp32/system_internal.c
View File

@@ -17,7 +17,6 @@
#include "soc/gpio_periph.h"
#include "soc/efuse_periph.h"
#include "soc/rtc_periph.h"
#include "soc/timer_periph.h"
#include "esp_cpu.h"
#include "soc/rtc.h"
#include "esp_private/rtc_clk.h"

3
components/esp_system/task_wdt/task_wdt_impl_timergroup.c
View File

@@ -8,9 +8,8 @@
#include <stdbool.h>
#include <stdio.h>
#include "sdkconfig.h"
#include "hal/mwdt_periph.h"
#include "hal/wdt_hal.h"
#include "hal/mwdt_ll.h"
#include "hal/timg_ll.h"
#include "soc/system_intr.h"
#include "esp_check.h"
#include "esp_err.h"

2
components/esp_tee/subproject/main/ld/esp32c5/esp_tee.ld.in
View File

@@ -205,7 +205,7 @@ SECTIONS
*libhal.a:apm_hal.c*(.literal .text .literal.* .text.*)
#endif
*libhal.a:brownout_hal.c*(.literal .text .literal.* .text.*)
*libhal.a:spi_flash_hal.c*(.literal .text .literal.* .text.*)
*libesp_hal_mspi.a:spi_flash_hal.c*(.literal .text .literal.* .text.*)
/* These HAL modules have functions marked with the IRAM_ATTR attribute which get placed in the SRAM */
*libhal.a:efuse_hal.c*(.literal .text .literal.* .text.*)
*libhal.a:lp_timer_hal.c*(.literal .text .literal.* .text.*)

2
components/esp_tee/subproject/main/ld/esp32c6/esp_tee.ld.in
View File

@@ -205,7 +205,7 @@ SECTIONS
*libhal.a:apm_hal.c*(.literal .text .literal.* .text.*)
#endif
*libhal.a:brownout_hal.c*(.literal .text .literal.* .text.*)
*libhal.a:spi_flash_hal.c*(.literal .text .literal.* .text.*)
*libesp_hal_mspi.a:spi_flash_hal.c*(.literal .text .literal.* .text.*)
/* These HAL modules have functions marked with the IRAM_ATTR attribute which get placed in the SRAM */
*libhal.a:efuse_hal.c*(.literal .text .literal.* .text.*)
*libhal.a:lp_timer_hal.c*(.literal .text .literal.* .text.*)

2
components/esp_tee/subproject/main/ld/esp32h2/esp_tee.ld.in
View File

@@ -205,7 +205,7 @@ SECTIONS
*libhal.a:apm_hal.c*(.literal .text .literal.* .text.*)
#endif
*libhal.a:brownout_hal.c*(.literal .text .literal.* .text.*)
*libhal.a:spi_flash_hal.c*(.literal .text .literal.* .text.*)
*libesp_hal_mspi.a:spi_flash_hal.c*(.literal .text .literal.* .text.*)
/* These HAL modules have functions marked with the IRAM_ATTR attribute which get placed in the SRAM */
*libhal.a:efuse_hal.c*(.literal .text .literal.* .text.*)
*libhal.a:lp_timer_hal.c*(.literal .text .literal.* .text.*)

11
components/soc/esp32/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 64 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 2 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 8 // Number of channels in each SDM instance

11
components/soc/esp32c2/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 1 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */

11
components/soc/esp32c3/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 4 // Number of channels in each SDM instance

11
components/soc/esp32c5/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */

11
components/soc/esp32c6/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */

11
components/soc/esp32c61/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */

11
components/soc/esp32h2/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */

11
components/soc/esp32h21/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 4 // Number of channels in each SDM instance

11
components/soc/esp32h4/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 1 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 4 // Number of channels in each SDM instance

11
components/soc/esp32p4/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 2 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */

11
components/soc/esp32s2/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 64 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 2 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 8 // Number of channels in each SDM instance

11
components/soc/esp32s3/include/soc/soc_caps_full.h
View File

@@ -9,17 +9,6 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- Timer Group -------------------------------------------*/
#define _SOC_CAPS_TIMG_INST_NUM 2 // Number of Timer Group instances
/*--------------------------- GPTIMER ---------------------------------------*/
#define _SOC_CAPS_GPTIMER_COUNTER_BIT_WIDTH 54 // Bit width of GPTIMER counter
#define _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG 2 // Number of general purpose timers in each Timer Group
#define _SOC_CAPS_GPTIMER_TIMERS_TOTAL (_SOC_CAPS_TIMG_INST_NUM * _SOC_CAPS_GPTIMER_TIMERS_PER_TIMG)
/*--------------------------- Watch Dog ------------------------------------------*/
#define _SOC_CAPS_WDT_MWDTS_PER_TIMG 1 // Number of main watchdog timers in each Timer Group
/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 8 // Number of channels in each SDM instance

1
components/spi_flash/test_apps/mspi_test/main/test_large_flash_writes.c
View File

@@ -17,7 +17,6 @@
#include "esp_log.h"
#include "esp_rom_spiflash.h"
#include "esp_private/cache_utils.h"
#include "soc/timer_periph.h"
#include "esp_flash.h"
#include "esp_partition.h"

2
components/spi_flash/test_apps/mspi_test/main/test_read_write.c
View File

@@ -15,12 +15,12 @@
#include "unity.h"
#include "spi_flash_mmap.h"
#include "esp_private/cache_utils.h"
#include "soc/timer_periph.h"
#include "esp_attr.h"
#include "esp_heap_caps.h"
#include "esp_rom_spiflash.h"
#include "esp_flash.h"
#include "esp_partition.h"
#include "soc/soc.h"
#if CONFIG_IDF_TARGET_ESP32
// Used for rom_fix function

4
tools/test_apps/system/memprot/main/esp32c3/test_panic.c
View File

@@ -22,7 +22,7 @@ void __real_esp_cpu_stall(int core_id);
static void disable_all_wdts(void)
{
wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
#endif
@@ -32,7 +32,7 @@ static void disable_all_wdts(void)
wdt_hal_disable(&wdt0_context);
wdt_hal_write_protect_enable(&wdt0_context);
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
//Interrupt WDT is the Main Watchdog Timer of Timer Group 1
wdt_hal_write_protect_disable(&wdt1_context);
wdt_hal_disable(&wdt1_context);

4
tools/test_apps/system/memprot/main/esp32s2/test_panic.c
View File

@@ -20,7 +20,7 @@ void __real_esp_cpu_stall(int core_id);
static void disable_all_wdts(void)
{
wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
#endif
@@ -30,7 +30,7 @@ static void disable_all_wdts(void)
wdt_hal_disable(&wdt0_context);
wdt_hal_write_protect_enable(&wdt0_context);
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
//Interrupt WDT is the Main Watchdog Timer of Timer Group 1
wdt_hal_write_protect_disable(&wdt1_context);
wdt_hal_disable(&wdt1_context);

4
tools/test_apps/system/memprot/main/esp32s3/test_panic.c
View File

@@ -20,7 +20,7 @@ void __real_esp_cpu_stall(int core_id);
static void disable_all_wdts(void)
{
wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
#endif
@@ -30,7 +30,7 @@ static void disable_all_wdts(void)
wdt_hal_disable(&wdt0_context);
wdt_hal_write_protect_enable(&wdt0_context);
#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
#if TIMG_LL_GET(INST_NUM) >= 2
//Interrupt WDT is the Main Watchdog Timer of Timer Group 1
wdt_hal_write_protect_disable(&wdt1_context);
wdt_hal_disable(&wdt1_context);